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https://review.coreboot.org/c/coreboot/+/64053
to look at the new patch set (#2).
Change subject: soc/amd/common/include/espi: reduce visibility of IO/MMIO decode defines ......................................................................
soc/amd/common/include/espi: reduce visibility of IO/MMIO decode defines
The eSPI decode range defines aren't and shouldn't be used directly from outside of the common AMD eSPI code which provides functions to abstract the register access, so move the defines from amdblocks/espi.h to espi_def.h inside the common AMD LPC/eSPI support directory to limit the visibility. The special I/O range decode bits need to stay in amdblocks/espi.h since those are used in the devicetree. Also update the indentation in espi_def.h so that the defines line up properly.
Signed-off-by: Felix Held felix-coreboot@felixheld.de Change-Id: Ic4ea30a1a6f10e94d88bf3b29f86dee2da6b39b5 --- M src/soc/amd/common/block/include/amdblocks/espi.h M src/soc/amd/common/block/lpc/espi_def.h 2 files changed, 63 insertions(+), 60 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/53/64053/2