New patch to review for coreboot: d1c1b16 libpayload: ehci: Set explicit terminate bits in dummy_qh next pointers.

[Isaac Christensen]

Isaac Christensen ([e-mail]) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/6608

-gerrit

commit d1c1b16006014d25b235ec95c3bfcba2a3490e13
Author: Julius Werner 
Date:   Thu Aug 22 16:24:09 2013 -0700

libpayload: ehci: Set explicit terminate bits in dummy_qh next pointers.

The EHCI host controllers in Samsung Exynos SoC seem to be a little more
    picky than Intel ones. When they reach the dummy_qh in the periodic
    frame list, they try to access the next qTD pointer even though it's
    NULL, an run into a HostSystemError. This patch explicitly sets the
    Terminate bit on those pointers to mark them invalid.

BUG=chrome-os-partner:18635
    TEST=Fix all the other issues with EHCI on ARM, then make sure it works.

Change-Id: I50fa79bbf1c5fab306d7885c01efd66b13e279b8
    Signed-off-by: Julius Werner 
    Reviewed-on: https://gerrit.chromium.org/gerrit/66884
    Reviewed-by: Vincent Palatin 
    (cherry picked from commit c575a5c958ce88732d28044352c89418bcd5ea86)
    Signed-off-by: Isaac Christensen 
---
 payloads/libpayload/drivers/usb/ehci.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/payloads/libpayload/drivers/usb/ehci.c b/payloads/libpayload/drivers/usb/ehci.c
index 0764592..af7daf1 100644
--- a/payloads/libpayload/drivers/usb/ehci.c
+++ b/payloads/libpayload/drivers/usb/ehci.c
@@ -793,6 +793,8 @@ ehci_init (unsigned long physical_bar)
    memset((void *)EHCI_INST(controller)->dummy_qh, 0,
    	sizeof(*EHCI_INST(controller)->dummy_qh));
    EHCI_INST(controller)->dummy_qh->horiz_link_ptr = QH_TERMINATE;
+	EHCI_INST(controller)->dummy_qh->td.next_qtd = QH_TERMINATE;
+	EHCI_INST(controller)->dummy_qh->td.alt_next_qtd = QH_TERMINATE;
    for (i = 0; i < 1024; ++i)
    	periodic_list[i] = virt_to_phys(EHCI_INST(controller)->dummy_qh)
    			   | PS_TYPE_QH;