[S] Change in coreboot[main]: mb/google/fatcat: Define EC_SYNC_IRQ and GPIO_PCH_WP for variants

[Subrata Banik (Code Review)]

Subrata Banik has submitted this change. ( https://review.coreboot.org/c/coreboot/+/84900?usp=email )

Change subject: mb/google/fatcat: Define EC_SYNC_IRQ and GPIO_PCH_WP for variants
......................................................................

mb/google/fatcat: Define EC_SYNC_IRQ and GPIO_PCH_WP for variants

This commit defines the EC_SYNC_IRQ and GPIO_PCH_WP macros for
different Fatcat variants.

The EC_SYNC_IRQ macro is used for tight timestamps and wake support,
while the GPIO_PCH_WP macro is used for the WP signal to the PCH.

These macros were previously undefined or incorrectly defined for some
variants. This commit fixes these issues and ensures that the macros
are defined correctly for all variants.

Specifically, this commit:

- Defines EC_SYNC_IRQ and GPIO_PCH_WP for Fatcat Nuvo and Fatcat ITE.
- Defines EC_SYNC_IRQ as 0 (not connected) for Fatcat.
- Defines GPIO_PCH_WP as GPP_D02 for Fatcat.
- Leaves EC_SYNC_IRQ and GPIO_PCH_WP as 0 (TODO) for Francka.

TEST=Able to build and boot google/fatcat.

w/o this patch:

```
cros_ec_lpcs GOOG0004:00: couldn't retrieve IRQ number (-22)
cros_ec_lpcs GOOG0004:00: probe with driver cros_ec_lpcs failed with error -22
```

w/ this patch:

```
cros_ec_lpcs GOOG0004:00: Chrome EC device registered
```

Change-Id: I9bd248496f08869c08cf6daafeed6584d0b166b7
Signed-off-by: Subrata Banik 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84900
Tested-by: build bot (Jenkins) 
Reviewed-by: Pranava Y N 
---
M src/mainboard/google/fatcat/variants/baseboard/fatcat/include/baseboard/ec.h
M src/mainboard/google/fatcat/variants/baseboard/fatcat/include/baseboard/gpio.h
2 files changed, 18 insertions(+), 7 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Pranava Y N: Looks good to me, approved

diff --git a/src/mainboard/google/fatcat/variants/baseboard/fatcat/include/baseboard/ec.h b/src/mainboard/google/fatcat/variants/baseboard/fatcat/include/baseboard/ec.h
index b9b4689..c354e8b 100644
--- a/src/mainboard/google/fatcat/variants/baseboard/fatcat/include/baseboard/ec.h
+++ b/src/mainboard/google/fatcat/variants/baseboard/fatcat/include/baseboard/ec.h
@@ -75,8 +75,10 @@
 /* Enable EC backed PD MCU device in ACPI */
 #define EC_ENABLE_PD_MCU_DEVICE

-#define EC_ENABLE_SYNC_IRQ      /* Enable tight timestamp / wake support */
-#define EC_SYNC_IRQ_WAKE_CAPABLE /* Let the OS know ec_sync is wake capable */
+#if !CONFIG(BOARD_GOOGLE_FATCAT)
+ #define EC_ENABLE_SYNC_IRQ      /* Enable tight timestamp / wake support */
+ #define EC_SYNC_IRQ_WAKE_CAPABLE /* Let the OS know ec_sync is wake capable */
+#endif

#define SIO_EC_ENABLE_PS2K       /* Enable PS/2 Keyboard */
 #define SIO_EC_HOST_ENABLE       /* EC Host Interface Resources */
diff --git a/src/mainboard/google/fatcat/variants/baseboard/fatcat/include/baseboard/gpio.h b/src/mainboard/google/fatcat/variants/baseboard/fatcat/include/baseboard/gpio.h
index 5a77e4e..3f94c03 100644
--- a/src/mainboard/google/fatcat/variants/baseboard/fatcat/include/baseboard/gpio.h
+++ b/src/mainboard/google/fatcat/variants/baseboard/fatcat/include/baseboard/gpio.h
@@ -6,12 +6,21 @@
 #include <soc/gpe.h>
 #include <soc/gpio.h>

-/* FIXME: update below code as per board schematics */
 /* eSPI virtual wire reporting */
 #define EC_SCI_GPI	GPE0_ESPI
-/* GPIO IRQ for tight timestamps / wake support */
-#define EC_SYNC_IRQ	0
-/* WP signal to PCH */
-#define GPIO_PCH_WP	0
+/*
+ * EC_SYNC_IRQ - GPIO IRQ for tight timestamps / wake support
+ * GPIO_PCH_WP - WP signal to PCH
+ */
+#if CONFIG(BOARD_GOOGLE_FATCATNUVO) || CONFIG(BOARD_GOOGLE_FATCATITE)
+ #define EC_SYNC_IRQ	GPP_E07_IRQ
+ #define GPIO_PCH_WP	GPP_D02
+#elif CONFIG(BOARD_GOOGLE_FATCAT)
+ #define EC_SYNC_IRQ	0 /* Not Connected */
+ #define GPIO_PCH_WP	GPP_D02
+#elif CONFIG(BOARD_GOOGLE_FRANCKA)
+ #define EC_SYNC_IRQ	0 /* TODO */
+ #define GPIO_PCH_WP	0 /* TODO */
+#endif

#endif /* __BASEBOARD_GPIO_H__ */