[M] Change in coreboot[main]: soc/intel: Enable crashlog IP for both 32-bit and 64-bit architectures

[Sowmya Aralguppe (Code Review)]

Attention is currently required from: Dinesh Gehlot, Eran Mitrani, Jakub Czapiga, Kapil Porwal, Nick Vaccaro, Pratikkumar V Prajapati, Subrata Banik, Tarun.

Sowmya Aralguppe has posted comments on this change by Sowmya Aralguppe. ( https://review.coreboot.org/c/coreboot/+/83106?usp=email )

Change subject: soc/intel: Enable crashlog IP for both 32-bit and 64-bit architectures
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Patch Set 20:

(3 comments)

File src/soc/intel/meteorlake/crashlog.c:

https://review.coreboot.org/c/coreboot/+/83106/comment/413816a3_e73315a2?usp... :
PS19, Line 352: cl_buffer
> The lopping is  done for number of child crashlog records and each child crahlog will hold buffer si […]

I have changed the name as buffer size

https://review.coreboot.org/c/coreboot/+/83106/comment/b05f4f45_c7f7a26f?usp... :
PS19, Line 353: */
> will correct it

Done

File src/soc/intel/tigerlake/crashlog_lib.c:

https://review.coreboot.org/c/coreboot/+/83106/comment/d160236b_acda51bf?usp... :
PS19, Line 165: bar_addr
> yes correct - will correct it - i had not changed anything in TGL other than pointer casting that ar […]

Done