Change in coreboot[master]: soc/broadwell: hook up smmstore

[Matt DeVillier (Code Review)]

Matt DeVillier has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/39192 )

Change subject: soc/broadwell: hook up smmstore
......................................................................

soc/broadwell: hook up smmstore

Adapted from implementation in sb/intel/common.

Test: build/boot variants of google/{jecht, auron}
with Tianocore and SMMSTORE enabled

Change-Id: I4d2aaa80dad229a6c7b947d0edf8fb1174050ad0
Signed-off-by: Matt DeVillier 
---
M src/soc/intel/broadwell/smihandler.c
1 file changed, 25 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/39192/1

diff --git a/src/soc/intel/broadwell/smihandler.c b/src/soc/intel/broadwell/smihandler.c
index 5b04f79..2c38887 100644
--- a/src/soc/intel/broadwell/smihandler.c
+++ b/src/soc/intel/broadwell/smihandler.c
@@ -35,6 +35,7 @@
 #include <soc/rcba.h>
 #include <soc/xhci.h>
 #include <drivers/intel/gma/i915_reg.h>
+#include <smmstore.h>

static u8 smm_initialized = 0;

@@ -311,6 +312,26 @@
    *ret = gsmi_exec(sub_command, param);
 }

+static void southbridge_smi_store(void)
+{
+	u8 sub_command, ret;
+	em64t101_smm_state_save_area_t *io_smi =
+		smi_apmc_find_state_save(APM_CNT_SMMSTORE);
+	uint32_t reg_ebx;
+
+	if (!io_smi)
+		return;
+	/* Command and return value in EAX */
+	sub_command = (io_smi->rax >> 8) & 0xff;
+
+	/* Parameter buffer in EBX */
+	reg_ebx = io_smi->rbx;
+
+	/* drivers/smmstore/smi.c */
+	ret = smmstore_exec(sub_command, (void *)reg_ebx);
+	io_smi->rax = ret;
+}
+
 static void southbridge_smi_apmc(void)
 {
    u8 reg8;
@@ -352,6 +373,10 @@
    	if (CONFIG(ELOG_GSMI))
    		southbridge_smi_gsmi();
    	break;
+	case APM_CNT_SMMSTORE:
+		if (CONFIG(SMMSTORE))
+			southbridge_smi_store();
+		break;
    }

mainboard_smi_apmc(reg8);

[Angel Pons (Code Review)]

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39192 )

Change subject: soc/broadwell: hook up smmstore
......................................................................

Patch Set 1: Code-Review+2

[Patrick Georgi (Code Review)]

Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/39192 )

Change subject: soc/broadwell: hook up smmstore
......................................................................

soc/broadwell: hook up smmstore

Adapted from implementation in sb/intel/common.

Test: build/boot variants of google/{jecht, auron}
with Tianocore and SMMSTORE enabled

Change-Id: I4d2aaa80dad229a6c7b947d0edf8fb1174050ad0
Signed-off-by: Matt DeVillier 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39192
Tested-by: build bot (Jenkins) 
Reviewed-by: Angel Pons 
---
M src/soc/intel/broadwell/smihandler.c
1 file changed, 25 insertions(+), 0 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Angel Pons: Looks good to me, approved

diff --git a/src/soc/intel/broadwell/smihandler.c b/src/soc/intel/broadwell/smihandler.c
index 5b04f79..2c38887 100644
--- a/src/soc/intel/broadwell/smihandler.c
+++ b/src/soc/intel/broadwell/smihandler.c
@@ -35,6 +35,7 @@
 #include <soc/rcba.h>
 #include <soc/xhci.h>
 #include <drivers/intel/gma/i915_reg.h>
+#include <smmstore.h>

static u8 smm_initialized = 0;

@@ -311,6 +312,26 @@
    *ret = gsmi_exec(sub_command, param);
 }

+static void southbridge_smi_store(void)
+{
+	u8 sub_command, ret;
+	em64t101_smm_state_save_area_t *io_smi =
+		smi_apmc_find_state_save(APM_CNT_SMMSTORE);
+	uint32_t reg_ebx;
+
+	if (!io_smi)
+		return;
+	/* Command and return value in EAX */
+	sub_command = (io_smi->rax >> 8) & 0xff;
+
+	/* Parameter buffer in EBX */
+	reg_ebx = io_smi->rbx;
+
+	/* drivers/smmstore/smi.c */
+	ret = smmstore_exec(sub_command, (void *)reg_ebx);
+	io_smi->rax = ret;
+}
+
 static void southbridge_smi_apmc(void)
 {
    u8 reg8;
@@ -352,6 +373,10 @@
    	if (CONFIG(ELOG_GSMI))
    		southbridge_smi_gsmi();
    	break;
+	case APM_CNT_SMMSTORE:
+		if (CONFIG(SMMSTORE))
+			southbridge_smi_store();
+		break;
    }

mainboard_smi_apmc(reg8);