Ravi kumar has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/61773 )
Change subject: sc7280: Add PCI config base address and length. ......................................................................
sc7280: Add PCI config base address and length.
Define PCIe config base address and config length to allow config access from payloads.
Signed-off-by: Prasad Malisetty quic_pmaliset@quicinc.com Change-Id: I492b2b5fb97e775e5928b1326209270f719f5651 --- M src/device/Kconfig M src/soc/qualcomm/sc7280/Kconfig 2 files changed, 24 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/73/61773/1
diff --git a/src/device/Kconfig b/src/device/Kconfig index cd8d8e9..94bf7e6 100644 --- a/src/device/Kconfig +++ b/src/device/Kconfig @@ -577,6 +577,18 @@ instance, for libpayload based payloads as the drivers don't enable bus mastering for PCI bridges.
+config MMIO_PCI_ATU_BASE + hex + depends on MMCONF_SUPPORT + +config MMIO_CONFIG_BASE_ADDRESS + hex + depends on MMCONF_SUPPORT + +config MMIO_CONFIG_LENGTH + hex + depends on MMCONF_SUPPORT + if PCI_ALLOW_BUS_MASTER
config PCI_SET_BUS_MASTER_PCI_BRIDGES diff --git a/src/soc/qualcomm/sc7280/Kconfig b/src/soc/qualcomm/sc7280/Kconfig index 3f3ded3..84db395 100644 --- a/src/soc/qualcomm/sc7280/Kconfig +++ b/src/soc/qualcomm/sc7280/Kconfig @@ -47,4 +47,16 @@ help Select the QUP instance to be used for UART console output.
+config MMIO_PCI_ATU_BASE + hex + default 0x40001000 + +config MMIO_BASE_ADDRESS + hex + default 0x40100000 + +config MMIO_LENGTH + hex + default 0x100000 + endif