Attention is currently required from: Annie Chen, Arthur Heymans, Chen, Gang C, Christian Walter, David Hendricks, Jincheng Li, Johnny Lin, Naresh Solanki, Nill Ge, Patrick Rudolph, TangYiwei, Tim Chu.
Shuo Liu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79878?usp=email )
Change subject: soc/intel/xeon_sp: Support multiple PCI segment groups
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Patch Set 2:
(1 comment)
File src/soc/intel/xeon_sp/spr/soc_acpi.c:
https://review.coreboot.org/c/coreboot/+/79878/comment/bed6740d_d589b4e7 :
PS2, Line 256: stack_enabled = false;
Hi Rudolph, […]
Adding a bit more background.
Here we will have https://review.coreboot.org/c/coreboot/+/78333, it will move the whole _CRS creation from ASL template to C codes. Hence for dynamically skipped stacks, it will have the whole _CRS not implemented, which is similar to with a _CRS but with null resources. Both should be okay from Linux point of view.
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