[XS] Change in coreboot[main]: soc/mediatek/common: Reduce eMMC clock frequency to 400 kHz

[Kiwi Liu (Code Review)]

Attention is currently required from: Kiwi Liu, Mengqi Zhang, Paul Menzel, Yu-Ping Wu.

Hello Hung-Te Lin, Mengqi Zhang, Yidi Lin, Yu-Ping Wu, build bot (Jenkins),

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/84298?usp=email

to look at the new patch set (#10).

Change subject: soc/mediatek/common: Reduce eMMC clock frequency to 400 kHz
......................................................................

soc/mediatek/common: Reduce eMMC clock frequency to 400 kHz

Mediatek SOCs start operating at eMMC clock around 2 MHz right after
power-on. In JEDEC spec, eMMC clock needs under 400 kHz.

BUG=b:356578805
TEST=test boot ok; measure eMMC clock ok

Change-Id: I9c8836b23fb21e9b0bdc80fbe85142ea0fa5e381
Signed-off-by: Mengqi Zhang 
Signed-off-by: Kiwi Liu 
---
M src/soc/mediatek/common/msdc.c
1 file changed, 1 insertion(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/98/84298/10