[XL] Change in coreboot[main]: soc/intel/ptl: Do initial Panther Lake SoC commit till bootblock
Attention is currently required from: Ashish Kumar Mishra, Dinesh Gehlot, Elyes Haouas, Eran Mitrani, Felix Singer, Jakub Czapiga, Jérémy Compostella, Kapil Porwal, Subrata Banik, Tarun.
Saurabh Mishra has posted comments on this change by Saurabh Mishra. ( https://review.coreboot.org/c/coreboot/+/83354?usp=email )
Change subject: soc/intel/ptl: Do initial Panther Lake SoC commit till bootblock ......................................................................
Patch Set 37:
(7 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/83354/comment/b8d27c0a_467013d6?usp... : PS36, Line 16:
Did you missed to highlighted that this CL also includes minimal code requires to compile the PTL So […]
Acknowledged
https://review.coreboot.org/c/coreboot/+/83354/comment/e8cdb177_fae439e7?usp... : PS36, Line 18: v
V?
Acknowledged
https://review.coreboot.org/c/coreboot/+/83354/comment/26d3d9fb_d8cabe36?usp... : PS36, Line 18: PSS
specify the acronyms
Acknowledged
File src/soc/intel/pantherlake/bootblock/report_platform.c:
https://review.coreboot.org/c/coreboot/+/83354/comment/8535902e_8d842f85?usp... : PS36, Line 39: { PCI_DID_INTEL_PTL_U_H_ESPI_0, "Pantherlake SOC-U" }, : { PCI_DID_INTEL_PTL_U_H_ESPI_1, "Pantherlake SOC-U SuperSKU" }, : { PCI_DID_INTEL_PTL_U_H_ESPI_2, "Pantherlake SOC-U Premium" }, : { PCI_DID_INTEL_PTL_U_H_ESPI_3, "Pantherlake SOC-U Base" }, : { PCI_DID_INTEL_PTL_U_H_ESPI_4, "Pantherlake SOC-U" }, : { PCI_DID_INTEL_PTL_U_H_ESPI_5, "Pantherlake SOC-U" }, : { PCI_DID_INTEL_PTL_U_H_ESPI_6, "Pantherlake SOC-U" }, : { PCI_DID_INTEL_PTL_U_H_ESPI_7, "Pantherlake SOC-U" }, : { PCI_DID_INTEL_PTL_U_H_ESPI_8, "Pantherlake SOC-U" }, : { PCI_DID_INTEL_PTL_U_H_ESPI_9, "Pantherlake SOC-U" }, : { PCI_DID_INTEL_PTL_U_H_ESPI_10, "Pantherlake SOC-U" }, : { PCI_DID_INTEL_PTL_U_H_ESPI_11, "Pantherlake SOC-U" }, : { PCI_DID_INTEL_PTL_U_H_ESPI_12, "Pantherlake SOC-U" }, : { PCI_DID_INTEL_PTL_U_H_ESPI_13, "Pantherlake SOC-U" }, : { PCI_DID_INTEL_PTL_U_H_ESPI_14, "Pantherlake SOC-U" }, : { PCI_DID_INTEL_PTL_U_H_ESPI_15, "Pantherlake SOC-U" }, : { PCI_DID_INTEL_PTL_U_H_ESPI_16, "Pantherlake SOC-U" }, : { PCI_DID_INTEL_PTL_U_H_ESPI_17, "Pantherlake SOC-U" }, : { PCI_DID_INTEL_PTL_U_H_ESPI_18, "Pantherlake SOC-U" }, : { PCI_DID_INTEL_PTL_U_H_ESPI_19, "Pantherlake SOC-U" }, : { PCI_DID_INTEL_PTL_U_H_ESPI_20, "Pantherlake SOC-U" }, : { PCI_DID_INTEL_PTL_U_H_ESPI_21, "Pantherlake SOC-U" }, : { PCI_DID_INTEL_PTL_U_H_ESPI_22, "Pantherlake SOC-U" }, : { PCI_DID_INTEL_PTL_U_H_ESPI_23, "Pantherlake SOC-U" }, : { PCI_DID_INTEL_PTL_U_H_ESPI_24, "Pantherlake SOC-U" }, : { PCI_DID_INTEL_PTL_U_H_ESPI_25, "Pantherlake SOC-U" }, : { PCI_DID_INTEL_PTL_U_H_ESPI_26, "Pantherlake SOC-U" }, : { PCI_DID_INTEL_PTL_U_H_ESPI_27, "Pantherlake SOC-U" }, : { PCI_DID_INTEL_PTL_U_H_ESPI_28, "Pantherlake SOC-U" }, : { PCI_DID_INTEL_PTL_U_H_ESPI_29, "Pantherlake SOC-U" }, : { PCI_DID_INTEL_PTL_U_H_ESPI_30, "Pantherlake SOC-U" }, : { PCI_DID_INTEL_PTL_U_H_ESPI_31, "Pantherlake SOC-U" },
should be specify these as "Panther Lake SoC-UH"
Acknowledged
https://review.coreboot.org/c/coreboot/+/83354/comment/4756ee6d_1529dc0a?usp... : PS36, Line 109: GT2
name and macro description are not matching
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https://review.coreboot.org/c/coreboot/+/83354/comment/9f195070_14b54044?usp... : PS36, Line 110: GT2
same
Acknowledged
File src/soc/intel/pantherlake/include/soc/soc_info.h:
https://review.coreboot.org/c/coreboot/+/83354/comment/adcf90c4_07bf71f1?usp... : PS36, Line 6: uint8_t get_soctype(void);
why we still have this ?
Acknowledged
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Saurabh Mishra (Code Review)