Attention is currently required from: Kapil Porwal, Pranava Y N, Subrata Banik.
Saurabh Mishra has posted comments on this change by Saurabh Mishra. ( https://review.coreboot.org/c/coreboot/+/83798?usp=email )
Change subject: soc/intel/ptl: Do initial Panther Lake SoC commit till ramstage
......................................................................
Patch Set 60:
(1 comment)
File src/soc/intel/pantherlake/acpi.c:
https://review.coreboot.org/c/coreboot/+/83798/comment/6748bcba_4f0c4135?usp... :
PS55, Line 247: (is_devfn_enabled(PCI_DEVFN_DPTF) ||
: is_devfn_enabled(PCI_DEVFN_IPU) ||
: is_devfn_enabled(PCI_DEVFN_NPU) ||
: is_devfn_enabled(PCI_DEVFN_IAA))
why we need to check these logic twice? […]
why we need to check these logic twice?
one here and one at line#258-#265?
Hi Subrata, this check is introduced to check if none of the IPs (i.e., DPTF, IPU, NPU, IAA) are enabled, then it should create drhd table for nongfxvt.
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