Attention is currently required from: Shreesh Chhabbi. Hello Shreesh Chhabbi,
I'd like you to do a code review. Please visit
https://review.coreboot.org/c/coreboot/+/49766
to review the following change.
Change subject: soc/intel/tgl: Disable S0i3.2 & S0i3.3 substates ......................................................................
soc/intel/tgl: Disable S0i3.2 & S0i3.3 substates
S0i3.2 and S0i3.3 are applicable only if wake on voice is disabled. As per Platform Design Guide, S0i3.2 and S0i3.3 substates need to be disabled for Tigerlake.
Signed-off-by: Shreesh Chhabbi shreesh.chhabbi@intel.corp-partner.google.com Change-Id: I5f2ac8b72d0c9b05bc02c092188d0c742cc83af9 --- M src/soc/intel/tigerlake/fsp_params.c 1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/66/49766/1
diff --git a/src/soc/intel/tigerlake/fsp_params.c b/src/soc/intel/tigerlake/fsp_params.c index b31d0ac..00805c0 100644 --- a/src/soc/intel/tigerlake/fsp_params.c +++ b/src/soc/intel/tigerlake/fsp_params.c @@ -233,7 +233,7 @@ * LPM0-s0i2.0, LPM1-s0i2.1, LPM2-s0i2.2, LPM3-s0i3.0, * LPM4-s0i3.1, LPM5-s0i3.2, LPM6-s0i3.3, LPM7-s0i3.4 */ - params->LpmStateEnableMask = LPM_S0iX_ALL & ~config->LpmStateDisableMask; + params->LpmStateEnableMask = (LPM_S0i2_0 | LPM_S0i2_1 | LPM_S0i2_2 | LPM_S0i3_0 | LPM_S0i3_1) & ~config->LpmStateDisableMask;
/* * Power Optimizer for DMI and SATA.