[S] Change in coreboot[master]: mb/google/myst: Store XHCI PCI resources

[Martin L Roth (Code Review)]

Martin L Roth has submitted this change. ( https://review.coreboot.org/c/coreboot/+/74281 )

(

14 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the submitted one.
 )Change subject: mb/google/myst: Store XHCI PCI resources
......................................................................

mb/google/myst: Store XHCI PCI resources

Implement `smm_mainboard_pci_resource_store_init` to store the
resources for XHCI devices. These stored resources are later used by
the elog code to log XHCI wake events.

BUG=b:277273428
TEST=builds

Signed-off-by: Jon Murphy 
Change-Id: I608d51f438681ac529323c23cc707845a3d609d1
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74281
Reviewed-by: Eric Lai 
Tested-by: build bot (Jenkins) 
---
M src/mainboard/google/myst/mainboard.c
1 file changed, 27 insertions(+), 0 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Eric Lai: Looks good to me, approved

diff --git a/src/mainboard/google/myst/mainboard.c b/src/mainboard/google/myst/mainboard.c
index 44e8f67..390dd4a 100644
--- a/src/mainboard/google/myst/mainboard.c
+++ b/src/mainboard/google/myst/mainboard.c
@@ -2,8 +2,10 @@

#include <amdblocks/acpimmio.h>
 #include <amdblocks/amd_pci_util.h>
+#include <amdblocks/xhci.h>
 #include <baseboard/variants.h>
 #include <console/console.h>
+#include <cpu/x86/smm.h>
 #include <device/device.h>
 #include <drivers/i2c/tpm/chip.h>
 #include <soc/acpi.h>
@@ -83,6 +85,11 @@
    pm_write32(PM_ESPI_INTR_CTRL, PM_ESPI_DEV_INTR_MASK & ~(BIT(1)));
 }

+void smm_mainboard_pci_resource_store_init(struct smm_pci_resource_info *slots, size_t size)
+{
+	soc_xhci_store_resources(slots, size);
+}
+
 struct chip_operations mainboard_ops = {
    .init = mainboard_init,
    .enable_dev = mainboard_enable,