Attention is currently required from: Michał Żygowski, Michał Kopeć, Angel Pons. Maxim Polyakov has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63403 )
Change subject: util/intelp2m: Add support for Alder Lake macro generation ......................................................................
Patch Set 3:
(5 comments)
File util/intelp2m/description.md:
https://review.coreboot.org/c/coreboot/+/63403/comment/bd8a1738_027f8d8f PS1, Line 39: AlderLake-H
Upon second thought, this is correct. […]
In order for intelp2m to work correctly for all variants of the Adler Lake family, it is necessary that GroupNameExtract and KeywordCheck return all possible pad's name suffixes of all these platforms. Please check this condition.
All other details (function names, PCIe or USB, etc.) have to be contained in the inteltool dump and have to correspond to the template for the parser intelp2m/parser/template.go
File util/intelp2m/gpio_adl_h.h:
PS3: Unnecessary file
File util/intelp2m/platforms/adl/macro.go:
https://review.coreboot.org/c/coreboot/+/63403/comment/1053fa72_4237fe36 PS3, Line 99: macro := common.GetInstanceMacro(PlatformSpecific{InheritanceMacro : cnl.PlatformSpecific{}}, : fields.InterfaceGet()) macro := common.GetInstanceMacro( PlatformSpecific{ InheritanceMacro: cnl.PlatformSpecific{ InheritanceMacro: snr.PlatformSpecific{}, }, }, fields.InterfaceGet(), )
(Step 4)
There is no constructor in the go structure as in C++, so we have to initialize all structures here. On the other side, we can see the basic platform, in this case it is snr
File util/intelp2m/platforms/adl_h/macro.go:
PS1:
I applied your suggestions, but it seems i've run into a new problem - looks like a problem with inh […]
Sorry, I forgot that Platform Specific for cnl has to be initialized in the same way. See "Step 4"
File util/intelp2m/platforms/adlh/macro.go:
https://review.coreboot.org/c/coreboot/+/63403/comment/7b33b52f_2677e7ec PS2, Line 20: MAX_DW_NUM = common.MAX_DW_NUM
According to coreboot code, ADL GPIOs have 4 DW registers
Are DW2 and DW3 values contained in the GPIO registers dump from inteltool for this platforms?
If so, @Michał could you write here an example of what it looks like for several pads?