Attention is currently required from: Felix Singer, Matt DeVillier.
Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/80167?usp=email )
Change subject: soc/intel/cannonlake: Report correct latencies for C states
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Patch Set 1:
(1 comment)
Patchset:
PS1:
what's the source for the corrected values?
I don't know, but it is what we write into the registers
(cannonlake/cpu.c:configure_c_states()). Funny thing: the
comments there provide better names for the indices. I
have no idea why we do this weird dance with these odd
macros... I'll update the commit message.
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