Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/62872 )
Change subject: soc/amd/cezanne: Add counter initializers ......................................................................
soc/amd/cezanne: Add counter initializers
Some counters are not being initialized and are relying on mainboards to set their values. If the mainboards have not implemented these functions it leads to indeterminate behavior.
BUG=b:224987813 TEST=builds
Signed-off-by: Jon Murphy jpmurphy@google.com Change-Id: I254e26080319478b1b5b1f5c353a7966cfac63b3 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62872 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Fred Reitberger reitbergerfred@gmail.com Reviewed-by: Raul Rangel rrangel@chromium.org Reviewed-by: Felix Held felix-coreboot@felixheld.de Reviewed-by: Karthik Ramasubramanian kramasub@google.com --- M src/soc/amd/cezanne/fsp_m_params.c 1 file changed, 4 insertions(+), 4 deletions(-)
Approvals: build bot (Jenkins): Verified Felix Held: Looks good to me, approved Raul Rangel: Looks good to me, approved Karthik Ramasubramanian: Looks good to me, approved Fred Reitberger: Looks good to me, but someone else must approve
diff --git a/src/soc/amd/cezanne/fsp_m_params.c b/src/soc/amd/cezanne/fsp_m_params.c index 92debe3..8c9e5a1 100644 --- a/src/soc/amd/cezanne/fsp_m_params.c +++ b/src/soc/amd/cezanne/fsp_m_params.c @@ -45,10 +45,10 @@
static void fsp_fill_pcie_ddi_descriptors(FSP_M_CONFIG *mcfg) { - const fsp_dxio_descriptor *fsp_dxio; - const fsp_ddi_descriptor *fsp_ddi; - size_t num_dxio; - size_t num_ddi; + const fsp_dxio_descriptor *fsp_dxio = NULL; + const fsp_ddi_descriptor *fsp_ddi = NULL; + size_t num_dxio = 0; + size_t num_ddi = 0;
mainboard_get_dxio_ddi_descriptors(&fsp_dxio, &num_dxio, &fsp_ddi, &num_ddi);