Lijian Zhao has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31967 )
Change subject: soc/intel/common: Move eventlog support into common code
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Patch Set 4:
(2 comments)
https://review.coreboot.org/#/c/31967/4/src/soc/intel/common/block/elog/elog...
File src/soc/intel/common/block/elog/elog.c:
https://review.coreboot.org/#/c/31967/4/src/soc/intel/common/block/elog/elog...
PS4, Line 38: static void pch_log_wake_source(struct chipset_power_state *ps)
Ack
I have checked the following EDS
APL,GLK,KBL,WHL,CNL and ICL, three bits we are using here is identical, we can move the definition to common.
However the GPE0 is totally different though, we will need dedicate pm.h in soc directory to take care of the difference.
https://review.coreboot.org/#/c/31967/4/src/soc/intel/common/block/elog/elog...
PS4, Line 72: pch_log_power_and_resets
Are these all bits same across different platforms such that they can be made common?
There's no gblrst_cause at small core, but they have gen_pmcon_1,2,3
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