[S] Change in coreboot[main]: mb/google/brya/var/trulo: Remove overriding of PL1 value to 20W

[Subrata Banik (Code Review)]

Subrata Banik has submitted this change. ( https://review.coreboot.org/c/coreboot/+/85184?usp=email )

(

5 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the submitted one.
 )Change subject: mb/google/brya/var/trulo: Remove overriding of PL1 value to 20W
......................................................................

mb/google/brya/var/trulo: Remove overriding of PL1 value to 20W

The RAPL PL1 limit and MMIO PL1 max values should be set as per
silicon TDP as specified in the PDG doc#646929.

BUG=b:378623372
TEST=Build and boot on Trulo board.
Verified PL1 value is updated in DTT and sysfs interfaces.
Output with 15W silicon as below:
cd /sys/class/powercap/
cat intel-rapl/intel-rapl:0/constraint_0_max_power_uw
15000000
cat intel-rapl/intel-rapl:0/constraint_0_power_limit_uw
15000000
cat intel-rapl-mmio/intel-rapl-mmio:0/constraint_0_max_power_uw
15000000
cat intel-rapl-mmio/intel-rapl-mmio:0/constraint_0_power_limit_uw
15000000

Change-Id: I798c4f10e10a579f470e00dbdb77a84619ad796a
Signed-off-by: Vidya Gopalakrishnan 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/85184
Reviewed-by: Paul Menzel 
Reviewed-by: Subrata Banik 
Tested-by: build bot (Jenkins) 
Reviewed-by: Eric Lai 
---
M src/mainboard/google/brya/variants/trulo/overridetree.cb
1 file changed, 4 insertions(+), 22 deletions(-)

Approvals:
  Subrata Banik: Looks good to me, approved
  Eric Lai: Looks good to me, but someone else must approve
  Paul Menzel: Looks good to me, but someone else must approve
  build bot (Jenkins): Verified

diff --git a/src/mainboard/google/brya/variants/trulo/overridetree.cb b/src/mainboard/google/brya/variants/trulo/overridetree.cb
index cbe3840..25aaf80 100644
--- a/src/mainboard/google/brya/variants/trulo/overridetree.cb
+++ b/src/mainboard/google/brya/variants/trulo/overridetree.cb
@@ -181,24 +181,6 @@
    	},
    }"

-	register "power_limits_config[ADL_N_041_6W_CORE]" = "{
-		.tdp_pl1_override = 20,
-		.tdp_pl2_override = 25,
-		.tdp_pl4 = 78,
-	}"
-
-	register "power_limits_config[ADL_N_081_7W_CORE]" = "{
-		.tdp_pl1_override = 20,
-		.tdp_pl2_override = 25,
-		.tdp_pl4 = 78,
-	}"
-
-	register "power_limits_config[ADL_N_081_15W_CORE]" = "{
-		.tdp_pl1_override = 20,
-		.tdp_pl2_override = 35,
-		.tdp_pl4 = 83,
-	}"
-
    device domain 0 on
    	device ref igpu on end
    	device ref dtt on
@@ -254,8 +236,8 @@

register "controls.power_limits" = "{
    				.pl1 = {
-						.min_power = 6000,
-						.max_power = 20000,
+						.min_power = 5000,
+						.max_power = 6000,
    					.time_window_min = 28 * MSECS_PER_SEC,
    					.time_window_max = 28 * MSECS_PER_SEC,
    					.granularity = 500
@@ -351,8 +333,8 @@

register "controls.power_limits" = "{
    				.pl1 = {
-						.min_power = 15000,
-						.max_power = 20000,
+						.min_power = 14000,
+						.max_power = 15000,
    					.time_window_min = 28 * MSECS_PER_SEC,
    					.time_window_max = 28 * MSECS_PER_SEC,
    					.granularity = 500