Change in coreboot[master]: trogdor: Fix "TPM interrupt" lb_gpio to be ACTIVE_HIGH

[Julius Werner (Code Review)]

Attention is currently required from: Shelley Chen, Douglas Anderson.
Hello Shelley Chen, Douglas Anderson,

I'd like you to do a code review. Please visit

https://review.coreboot.org/c/coreboot/+/56901

to review the following change.

Change subject: trogdor: Fix "TPM interrupt" lb_gpio to be ACTIVE_HIGH
......................................................................

trogdor: Fix "TPM interrupt" lb_gpio to be ACTIVE_HIGH

"Latched" GPIOs like this one are a virtual representation of the
pending interrupt flag for the edge-triggered pin and not a direct
representation of line state, so they should always be marked
ACTIVE_HIGH or depthcharge will incorrectly negate them. This has always
been wrong and meant that depthcharge doesn't correctly wait for Cr50
flow control responses on these platforms. Thankfully it doesn't seem
like we've seen any practical issues from this, but it's still very
wrong.

BRANCH=trogdor
BUG=none
TEST=Booted CoachZ (no visible difference)

Signed-off-by: Julius Werner 
Change-Id: Ie1586b0e10b64df0712e28552411c4d540a7e457
---
M src/mainboard/google/trogdor/chromeos.c
1 file changed, 1 insertion(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/01/56901/1

diff --git a/src/mainboard/google/trogdor/chromeos.c b/src/mainboard/google/trogdor/chromeos.c
index 2136da3..c218388 100644
--- a/src/mainboard/google/trogdor/chromeos.c
+++ b/src/mainboard/google/trogdor/chromeos.c
@@ -31,7 +31,7 @@
    		"EC in RW"},
    	{GPIO_AP_EC_INT.addr, ACTIVE_LOW, gpio_get(GPIO_AP_EC_INT),
    		"EC interrupt"},
-		{GPIO_H1_AP_INT.addr, ACTIVE_LOW, gpio_get(GPIO_H1_AP_INT),
+		{GPIO_H1_AP_INT.addr, ACTIVE_HIGH, gpio_get(GPIO_H1_AP_INT),
    		"TPM interrupt"},
    	{GPIO_SD_CD_L.addr, ACTIVE_LOW, gpio_get(GPIO_SD_CD_L),
    		"SD card detect"},