Attention is currently required from: Jason Glenesk, Raul Rangel, Chris Wang, Fred Reitberger, Felix Held.
Matt DeVillier has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74757 )
Change subject: vc/amd/fsp/mendocino/FspmUpd: Update Update UPD structure for MDN-FSP
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Patch Set 1:
(1 comment)
File src/vendorcode/amd/fsp/mendocino/FspmUpd.h:
https://review.coreboot.org/c/coreboot/+/74757/comment/878cf36e_48f157e6
PS1, Line 104: pwr_on_vary_bl_to_blon;
: /** Offset 0x04EB**/ uint8_t pwr_down_bloff_to_varybloff;
if these UPDs are directly controlling display panel timing delays, would it not be better to name them something like 'edp_panel_t{x}', have the timing values set directly, and do the translation to 4ms units inside FSP?
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