Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/85818?usp=email )
Change subject: mb/google/brya/baseboard/trulo: Disable GPIO dynamic clock gating ......................................................................
mb/google/brya/baseboard/trulo: Disable GPIO dynamic clock gating
This change disables dynamic clock gating for GPIO on the Trulo baseboard by overriding the weak function `variant_update_soc_chip_config()`.
This is necessary to ensure that short interrupt pulses can be reliably captured. With dynamic clock gating enabled, the GPIO clocks may be gated off, preventing the interrupt from being detected.
This change sets bits 0-5 in the MISC_CONFIGURATION register for each GPIO community to disable dynamic clock gating.
TEST=Verified that GPIO dynamic clock gating is disabled by dumping the GPIO community MISC_CONFIGURATION registers.
Change-Id: I5e853f12a0c78d8d179faba0cef4c99128296f2f Signed-off-by: Subrata Banik subratabanik@google.com --- M src/mainboard/google/brya/variants/baseboard/trulo/Makefile.mk A src/mainboard/google/brya/variants/baseboard/trulo/trulo.c 2 files changed, 16 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/85818/1
diff --git a/src/mainboard/google/brya/variants/baseboard/trulo/Makefile.mk b/src/mainboard/google/brya/variants/baseboard/trulo/Makefile.mk index cc62f1d..5084b09 100644 --- a/src/mainboard/google/brya/variants/baseboard/trulo/Makefile.mk +++ b/src/mainboard/google/brya/variants/baseboard/trulo/Makefile.mk @@ -2,3 +2,4 @@
romstage-$(CONFIG_MAINBOARD_USE_EARLY_LIBGFXINIT) += gma-mainboard.ads romstage-y += memory.c +ramstage-y += trulo.c diff --git a/src/mainboard/google/brya/variants/baseboard/trulo/trulo.c b/src/mainboard/google/brya/variants/baseboard/trulo/trulo.c new file mode 100644 index 0000000..3d6c373 --- /dev/null +++ b/src/mainboard/google/brya/variants/baseboard/trulo/trulo.c @@ -0,0 +1,15 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <baseboard/variants.h> + +void variant_update_soc_chip_config(struct soc_intel_alderlake_config *config) +{ + printk(BIOS_INFO, "Disabling GPIO PM inside %s for Trulo baseboard\n", __func__); + config->gpio_override_pm = 1; + config->gpio_pm[COMM_0] = 0; + config->gpio_pm[COMM_1] = 0; + config->gpio_pm[COMM_2] = 0; + config->gpio_pm[COMM_3] = 0; + config->gpio_pm[COMM_4] = 0; + config->gpio_pm[COMM_5] = 0; +}