Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/44232 )
Change subject: cpu/x86: Introduce `CPU_X86_TSC` ......................................................................
cpu/x86: Introduce `CPU_X86_TSC`
There's no need for relative paths with Kconfig options.
Change-Id: Ie7d8229d23b3fa515e56f4a4541b246ac7a6fbc1 Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/cpu/amd/agesa/family14/Kconfig M src/cpu/amd/agesa/family14/Makefile.inc M src/cpu/amd/agesa/family15tn/Kconfig M src/cpu/amd/agesa/family15tn/Makefile.inc M src/cpu/amd/agesa/family16kb/Kconfig M src/cpu/amd/agesa/family16kb/Makefile.inc M src/cpu/amd/pi/00630F01/Kconfig M src/cpu/amd/pi/00630F01/Makefile.inc M src/cpu/amd/pi/00660F01/Kconfig M src/cpu/amd/pi/00660F01/Makefile.inc M src/cpu/amd/pi/00730F01/Kconfig M src/cpu/amd/pi/00730F01/Makefile.inc M src/cpu/intel/haswell/Kconfig M src/cpu/intel/haswell/Makefile.inc M src/cpu/intel/model_2065x/Kconfig M src/cpu/intel/model_2065x/Makefile.inc M src/cpu/intel/model_206ax/Kconfig M src/cpu/intel/model_206ax/Makefile.inc M src/cpu/intel/slot_1/Kconfig M src/cpu/intel/slot_1/Makefile.inc M src/cpu/intel/socket_441/Kconfig M src/cpu/intel/socket_441/Makefile.inc M src/cpu/intel/socket_BGA956/Kconfig M src/cpu/intel/socket_BGA956/Makefile.inc M src/cpu/intel/socket_FCBGA559/Kconfig M src/cpu/intel/socket_FCBGA559/Makefile.inc M src/cpu/intel/socket_LGA775/Kconfig M src/cpu/intel/socket_LGA775/Makefile.inc M src/cpu/intel/socket_m/Kconfig M src/cpu/intel/socket_m/Makefile.inc M src/cpu/intel/socket_mPGA604/Kconfig M src/cpu/intel/socket_mPGA604/Makefile.inc M src/cpu/intel/socket_p/Kconfig M src/cpu/intel/socket_p/Makefile.inc M src/cpu/qemu-x86/Kconfig M src/cpu/qemu-x86/Makefile.inc M src/cpu/x86/Kconfig M src/cpu/x86/Makefile.inc M src/soc/amd/picasso/Kconfig M src/soc/amd/picasso/Makefile.inc M src/soc/amd/stoneyridge/Kconfig M src/soc/amd/stoneyridge/Makefile.inc M src/soc/intel/apollolake/Kconfig M src/soc/intel/apollolake/Makefile.inc M src/soc/intel/baytrail/Kconfig M src/soc/intel/baytrail/Makefile.inc M src/soc/intel/braswell/Kconfig M src/soc/intel/braswell/Makefile.inc M src/soc/intel/broadwell/Kconfig M src/soc/intel/broadwell/Makefile.inc M src/soc/intel/cannonlake/Kconfig M src/soc/intel/cannonlake/Makefile.inc M src/soc/intel/denverton_ns/Kconfig M src/soc/intel/denverton_ns/Makefile.inc M src/soc/intel/icelake/Kconfig M src/soc/intel/icelake/Makefile.inc M src/soc/intel/jasperlake/Kconfig M src/soc/intel/jasperlake/Makefile.inc M src/soc/intel/quark/Kconfig M src/soc/intel/quark/Makefile.inc M src/soc/intel/skylake/Kconfig M src/soc/intel/skylake/Makefile.inc M src/soc/intel/tigerlake/Kconfig M src/soc/intel/tigerlake/Makefile.inc M src/soc/intel/xeon_sp/Kconfig M src/soc/intel/xeon_sp/cpx/Makefile.inc M src/soc/intel/xeon_sp/skx/Makefile.inc 67 files changed, 37 insertions(+), 34 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/32/44232/1
diff --git a/src/cpu/amd/agesa/family14/Kconfig b/src/cpu/amd/agesa/family14/Kconfig index de8e326..8667602 100644 --- a/src/cpu/amd/agesa/family14/Kconfig +++ b/src/cpu/amd/agesa/family14/Kconfig @@ -6,6 +6,7 @@ select CPU_X86_LAPIC select CPU_X86_MTRR select CPU_X86_SMM + select CPU_X86_TSC select X86_AMD_FIXED_MTRRS
if CPU_AMD_AGESA_FAMILY14 diff --git a/src/cpu/amd/agesa/family14/Makefile.inc b/src/cpu/amd/agesa/family14/Makefile.inc index 9576708..8ec1104 100644 --- a/src/cpu/amd/agesa/family14/Makefile.inc +++ b/src/cpu/amd/agesa/family14/Makefile.inc @@ -7,5 +7,4 @@ ramstage-y += model_14_init.c
subdirs-y += ../../mtrr -subdirs-y += ../../../x86/tsc subdirs-y += ../../../x86/pae diff --git a/src/cpu/amd/agesa/family15tn/Kconfig b/src/cpu/amd/agesa/family15tn/Kconfig index df7ac26..4b6b40e 100644 --- a/src/cpu/amd/agesa/family15tn/Kconfig +++ b/src/cpu/amd/agesa/family15tn/Kconfig @@ -6,6 +6,7 @@ select CPU_X86_LAPIC select CPU_X86_MTRR select CPU_X86_SMM + select CPU_X86_TSC select X86_AMD_FIXED_MTRRS
if CPU_AMD_AGESA_FAMILY15_TN diff --git a/src/cpu/amd/agesa/family15tn/Makefile.inc b/src/cpu/amd/agesa/family15tn/Makefile.inc index 1d5779d..707e700 100644 --- a/src/cpu/amd/agesa/family15tn/Makefile.inc +++ b/src/cpu/amd/agesa/family15tn/Makefile.inc @@ -10,5 +10,4 @@
subdirs-y += ../../mtrr subdirs-y += ../../smm -subdirs-y += ../../../x86/tsc subdirs-y += ../../../x86/pae diff --git a/src/cpu/amd/agesa/family16kb/Kconfig b/src/cpu/amd/agesa/family16kb/Kconfig index 0cafdf5..1b43dbe 100644 --- a/src/cpu/amd/agesa/family16kb/Kconfig +++ b/src/cpu/amd/agesa/family16kb/Kconfig @@ -6,6 +6,7 @@ select CPU_X86_LAPIC select CPU_X86_MTRR select CPU_X86_SMM + select CPU_X86_TSC select X86_AMD_FIXED_MTRRS
if CPU_AMD_AGESA_FAMILY16_KB diff --git a/src/cpu/amd/agesa/family16kb/Makefile.inc b/src/cpu/amd/agesa/family16kb/Makefile.inc index d775c54..a39673d 100644 --- a/src/cpu/amd/agesa/family16kb/Makefile.inc +++ b/src/cpu/amd/agesa/family16kb/Makefile.inc @@ -7,5 +7,4 @@ ramstage-y += model_16_init.c
subdirs-y += ../../mtrr -subdirs-y += ../../../x86/tsc subdirs-y += ../../../x86/pae diff --git a/src/cpu/amd/pi/00630F01/Kconfig b/src/cpu/amd/pi/00630F01/Kconfig index 65f66df..db921c3 100644 --- a/src/cpu/amd/pi/00630F01/Kconfig +++ b/src/cpu/amd/pi/00630F01/Kconfig @@ -6,6 +6,7 @@ select CPU_X86_LAPIC select CPU_X86_MTRR select CPU_X86_SMM + select CPU_X86_TSC select X86_AMD_FIXED_MTRRS
if CPU_AMD_PI_00630F01 diff --git a/src/cpu/amd/pi/00630F01/Makefile.inc b/src/cpu/amd/pi/00630F01/Makefile.inc index 1d5779d..707e700 100644 --- a/src/cpu/amd/pi/00630F01/Makefile.inc +++ b/src/cpu/amd/pi/00630F01/Makefile.inc @@ -10,5 +10,4 @@
subdirs-y += ../../mtrr subdirs-y += ../../smm -subdirs-y += ../../../x86/tsc subdirs-y += ../../../x86/pae diff --git a/src/cpu/amd/pi/00660F01/Kconfig b/src/cpu/amd/pi/00660F01/Kconfig index 4b7a665..859dda0 100644 --- a/src/cpu/amd/pi/00660F01/Kconfig +++ b/src/cpu/amd/pi/00660F01/Kconfig @@ -6,6 +6,7 @@ select CPU_X86_LAPIC select CPU_X86_MTRR select CPU_X86_SMM + select CPU_X86_TSC select X86_AMD_FIXED_MTRRS
if CPU_AMD_PI_00660F01 diff --git a/src/cpu/amd/pi/00660F01/Makefile.inc b/src/cpu/amd/pi/00660F01/Makefile.inc index bcbc7fe..95bd867 100644 --- a/src/cpu/amd/pi/00660F01/Makefile.inc +++ b/src/cpu/amd/pi/00660F01/Makefile.inc @@ -6,5 +6,4 @@ ramstage-y += model_15_init.c
subdirs-y += ../../mtrr -subdirs-y += ../../../x86/tsc subdirs-y += ../../../x86/pae diff --git a/src/cpu/amd/pi/00730F01/Kconfig b/src/cpu/amd/pi/00730F01/Kconfig index 4247189..c8c6e0a 100644 --- a/src/cpu/amd/pi/00730F01/Kconfig +++ b/src/cpu/amd/pi/00730F01/Kconfig @@ -6,6 +6,7 @@ select CPU_X86_LAPIC select CPU_X86_MTRR select CPU_X86_SMM + select CPU_X86_TSC select X86_AMD_FIXED_MTRRS select SUPPORT_CPU_UCODE_IN_CBFS select MICROCODE_BLOB_UNDISCLOSED diff --git a/src/cpu/amd/pi/00730F01/Makefile.inc b/src/cpu/amd/pi/00730F01/Makefile.inc index c33c642..43c0c97 100644 --- a/src/cpu/amd/pi/00730F01/Makefile.inc +++ b/src/cpu/amd/pi/00730F01/Makefile.inc @@ -8,5 +8,4 @@ ramstage-y += update_microcode.c
subdirs-y += ../../mtrr -subdirs-y += ../../../x86/tsc subdirs-y += ../../../x86/pae diff --git a/src/cpu/intel/haswell/Kconfig b/src/cpu/intel/haswell/Kconfig index e234cab..6f84c99 100644 --- a/src/cpu/intel/haswell/Kconfig +++ b/src/cpu/intel/haswell/Kconfig @@ -13,6 +13,7 @@ select CPU_X86_LAPIC select CPU_X86_MTRR select CPU_X86_SMM + select CPU_X86_TSC select MMX select SSE2 select UDELAY_TSC diff --git a/src/cpu/intel/haswell/Makefile.inc b/src/cpu/intel/haswell/Makefile.inc index 2f2c128..156699a 100644 --- a/src/cpu/intel/haswell/Makefile.inc +++ b/src/cpu/intel/haswell/Makefile.inc @@ -15,7 +15,6 @@
subdirs-y += ../microcode subdirs-y += ../turbo -subdirs-y += ../../x86/tsc
cpu_microcode_bins += $(wildcard 3rdparty/intel-microcode/intel-ucode/06-3c-*) cpu_microcode_bins += $(wildcard 3rdparty/intel-microcode/intel-ucode/06-45-*) diff --git a/src/cpu/intel/model_2065x/Kconfig b/src/cpu/intel/model_2065x/Kconfig index 9a7f6bb..d59afe9 100644 --- a/src/cpu/intel/model_2065x/Kconfig +++ b/src/cpu/intel/model_2065x/Kconfig @@ -13,6 +13,7 @@ select CPU_X86_LAPIC select CPU_X86_MTRR select CPU_X86_SMM + select CPU_X86_TSC select SSE2 select UDELAY_TSC select TSC_MONOTONIC_TIMER diff --git a/src/cpu/intel/model_2065x/Makefile.inc b/src/cpu/intel/model_2065x/Makefile.inc index 08b6191..9b28281 100644 --- a/src/cpu/intel/model_2065x/Makefile.inc +++ b/src/cpu/intel/model_2065x/Makefile.inc @@ -15,6 +15,5 @@ subdirs-y += ../smm/gen1 subdirs-y += ../turbo subdirs-y += ../../x86/name -subdirs-y += ../../x86/tsc
cpu_microcode_bins += $(wildcard 3rdparty/intel-microcode/intel-ucode/06-25-*) diff --git a/src/cpu/intel/model_206ax/Kconfig b/src/cpu/intel/model_206ax/Kconfig index cfb12d9..239978d 100644 --- a/src/cpu/intel/model_206ax/Kconfig +++ b/src/cpu/intel/model_206ax/Kconfig @@ -13,6 +13,7 @@ select CPU_X86_LAPIC select CPU_X86_MTRR select CPU_X86_SMM + select CPU_X86_TSC select MMX select SSE2 select UDELAY_TSC diff --git a/src/cpu/intel/model_206ax/Makefile.inc b/src/cpu/intel/model_206ax/Makefile.inc index 00802fc..80c3306 100644 --- a/src/cpu/intel/model_206ax/Makefile.inc +++ b/src/cpu/intel/model_206ax/Makefile.inc @@ -19,7 +19,6 @@ subdirs-y += ../smm/gen1 subdirs-y += ../turbo subdirs-y += ../../x86/name -subdirs-y += ../../x86/tsc
cpu_microcode_bins += $(wildcard 3rdparty/intel-microcode/intel-ucode/06-2a-*) cpu_microcode_bins += $(wildcard 3rdparty/intel-microcode/intel-ucode/06-3a-*) diff --git a/src/cpu/intel/slot_1/Kconfig b/src/cpu/intel/slot_1/Kconfig index ae48885..4a246fb 100644 --- a/src/cpu/intel/slot_1/Kconfig +++ b/src/cpu/intel/slot_1/Kconfig @@ -15,6 +15,7 @@ select CPU_X86_LAPIC select CPU_X86_MTRR select CPU_X86_SMM + select CPU_X86_TSC select NO_SMM select UDELAY_TSC select TSC_MONOTONIC_TIMER diff --git a/src/cpu/intel/slot_1/Makefile.inc b/src/cpu/intel/slot_1/Makefile.inc index c071ec8..856ecf6 100644 --- a/src/cpu/intel/slot_1/Makefile.inc +++ b/src/cpu/intel/slot_1/Makefile.inc @@ -7,7 +7,6 @@ subdirs-y += ../model_67x subdirs-y += ../model_68x subdirs-y += ../model_6bx -subdirs-y += ../../x86/tsc subdirs-y += ../microcode
bootblock-y += ../car/p3/cache_as_ram.S diff --git a/src/cpu/intel/socket_441/Kconfig b/src/cpu/intel/socket_441/Kconfig index c66e463..8b4fdd1 100644 --- a/src/cpu/intel/socket_441/Kconfig +++ b/src/cpu/intel/socket_441/Kconfig @@ -9,6 +9,7 @@ select CPU_X86_LAPIC select CPU_X86_MTRR select CPU_X86_SMM + select CPU_X86_TSC select MMX select SSE select SETUP_XIP_CACHE diff --git a/src/cpu/intel/socket_441/Makefile.inc b/src/cpu/intel/socket_441/Makefile.inc index a502290..6db031d 100644 --- a/src/cpu/intel/socket_441/Makefile.inc +++ b/src/cpu/intel/socket_441/Makefile.inc @@ -10,4 +10,3 @@ subdirs-y += ../hyperthreading subdirs-y += ../microcode subdirs-y += ../speedstep -subdirs-y += ../../x86/tsc diff --git a/src/cpu/intel/socket_BGA956/Kconfig b/src/cpu/intel/socket_BGA956/Kconfig index 8b92d36..da993f7 100644 --- a/src/cpu/intel/socket_BGA956/Kconfig +++ b/src/cpu/intel/socket_BGA956/Kconfig @@ -4,6 +4,7 @@ select CPU_X86_LAPIC select CPU_X86_MTRR select CPU_X86_SMM + select CPU_X86_TSC select MMX select SSE
diff --git a/src/cpu/intel/socket_BGA956/Makefile.inc b/src/cpu/intel/socket_BGA956/Makefile.inc index 7c7149d..ac796b5 100644 --- a/src/cpu/intel/socket_BGA956/Makefile.inc +++ b/src/cpu/intel/socket_BGA956/Makefile.inc @@ -10,4 +10,3 @@ subdirs-y += ../hyperthreading subdirs-y += ../microcode subdirs-y += ../speedstep -subdirs-y += ../../x86/tsc diff --git a/src/cpu/intel/socket_FCBGA559/Kconfig b/src/cpu/intel/socket_FCBGA559/Kconfig index bb1e1a6..71796ce 100644 --- a/src/cpu/intel/socket_FCBGA559/Kconfig +++ b/src/cpu/intel/socket_FCBGA559/Kconfig @@ -11,6 +11,7 @@ select CPU_X86_LAPIC select CPU_X86_MTRR select CPU_X86_SMM + select CPU_X86_TSC select MMX select SSE select CPU_HAS_L2_ENABLE_MSR diff --git a/src/cpu/intel/socket_FCBGA559/Makefile.inc b/src/cpu/intel/socket_FCBGA559/Makefile.inc index 8f360f1..89c3a15 100644 --- a/src/cpu/intel/socket_FCBGA559/Makefile.inc +++ b/src/cpu/intel/socket_FCBGA559/Makefile.inc @@ -10,4 +10,3 @@ subdirs-y += ../hyperthreading subdirs-y += ../microcode subdirs-y += ../speedstep -subdirs-y += ../../x86/tsc diff --git a/src/cpu/intel/socket_LGA775/Kconfig b/src/cpu/intel/socket_LGA775/Kconfig index ca0a513..34eb5a2 100644 --- a/src/cpu/intel/socket_LGA775/Kconfig +++ b/src/cpu/intel/socket_LGA775/Kconfig @@ -12,6 +12,7 @@ select CPU_X86_LAPIC select CPU_X86_MTRR select CPU_X86_SMM + select CPU_X86_TSC select MMX select SSE select SIPI_VECTOR_IN_ROM diff --git a/src/cpu/intel/socket_LGA775/Makefile.inc b/src/cpu/intel/socket_LGA775/Makefile.inc index 5f3ef15..a028078 100644 --- a/src/cpu/intel/socket_LGA775/Makefile.inc +++ b/src/cpu/intel/socket_LGA775/Makefile.inc @@ -14,4 +14,3 @@ subdirs-y += ../hyperthreading subdirs-y += ../microcode subdirs-y += ../speedstep -subdirs-y += ../../x86/tsc diff --git a/src/cpu/intel/socket_m/Kconfig b/src/cpu/intel/socket_m/Kconfig index e13e1d0..3676707 100644 --- a/src/cpu/intel/socket_m/Kconfig +++ b/src/cpu/intel/socket_m/Kconfig @@ -10,6 +10,7 @@ select CPU_X86_LAPIC select CPU_X86_MTRR select CPU_X86_SMM + select CPU_X86_TSC select MMX select SSE
diff --git a/src/cpu/intel/socket_m/Makefile.inc b/src/cpu/intel/socket_m/Makefile.inc index 6d28bab..25dc0bd 100644 --- a/src/cpu/intel/socket_m/Makefile.inc +++ b/src/cpu/intel/socket_m/Makefile.inc @@ -11,4 +11,3 @@ subdirs-y += ../hyperthreading subdirs-y += ../microcode subdirs-y += ../speedstep -subdirs-y += ../../x86/tsc diff --git a/src/cpu/intel/socket_mPGA604/Kconfig b/src/cpu/intel/socket_mPGA604/Kconfig index 02145d5..5c830b8 100644 --- a/src/cpu/intel/socket_mPGA604/Kconfig +++ b/src/cpu/intel/socket_mPGA604/Kconfig @@ -9,6 +9,7 @@ select CPU_X86_LAPIC select CPU_X86_MTRR select CPU_X86_SMM + select CPU_X86_TSC select MMX select SSE select UDELAY_TSC diff --git a/src/cpu/intel/socket_mPGA604/Makefile.inc b/src/cpu/intel/socket_mPGA604/Makefile.inc index 5e17ab8..380db8e 100644 --- a/src/cpu/intel/socket_mPGA604/Makefile.inc +++ b/src/cpu/intel/socket_mPGA604/Makefile.inc @@ -1,5 +1,4 @@ subdirs-y += ../model_f2x -subdirs-y += ../../x86/tsc subdirs-y += ../microcode subdirs-y += ../hyperthreading
diff --git a/src/cpu/intel/socket_p/Kconfig b/src/cpu/intel/socket_p/Kconfig index 6c8c3f7..3fba30b 100644 --- a/src/cpu/intel/socket_p/Kconfig +++ b/src/cpu/intel/socket_p/Kconfig @@ -5,6 +5,7 @@ select CPU_X86_LAPIC select CPU_X86_MTRR select CPU_X86_SMM + select CPU_X86_TSC select MMX select SSE
diff --git a/src/cpu/intel/socket_p/Makefile.inc b/src/cpu/intel/socket_p/Makefile.inc index 5d5f520..981ef1f 100644 --- a/src/cpu/intel/socket_p/Makefile.inc +++ b/src/cpu/intel/socket_p/Makefile.inc @@ -11,4 +11,3 @@ subdirs-y += ../hyperthreading subdirs-y += ../microcode subdirs-y += ../speedstep -subdirs-y += ../../x86/tsc diff --git a/src/cpu/qemu-x86/Kconfig b/src/cpu/qemu-x86/Kconfig index 6ab327f..e45c1e21 100644 --- a/src/cpu/qemu-x86/Kconfig +++ b/src/cpu/qemu-x86/Kconfig @@ -9,6 +9,7 @@ select CPU_X86_LAPIC select CPU_X86_MTRR select CPU_X86_SMM + select CPU_X86_TSC select SMP select UDELAY_TSC select TSC_MONOTONIC_TIMER diff --git a/src/cpu/qemu-x86/Makefile.inc b/src/cpu/qemu-x86/Makefile.inc index d2738cf..b50dee5 100644 --- a/src/cpu/qemu-x86/Makefile.inc +++ b/src/cpu/qemu-x86/Makefile.inc @@ -6,5 +6,3 @@ romstage-y += ../intel/car/romstage.c
ramstage-y += qemu.c - -subdirs-y += ../x86/tsc diff --git a/src/cpu/x86/Kconfig b/src/cpu/x86/Kconfig index dddd911..5dad9dd 100644 --- a/src/cpu/x86/Kconfig +++ b/src/cpu/x86/Kconfig @@ -14,6 +14,10 @@ bool default n
+config CPU_X86_TSC + bool + default n + # TODO These two options look too similar config PARALLEL_CPU_INIT bool diff --git a/src/cpu/x86/Makefile.inc b/src/cpu/x86/Makefile.inc index 9616bb4..c661d4a 100644 --- a/src/cpu/x86/Makefile.inc +++ b/src/cpu/x86/Makefile.inc @@ -3,6 +3,7 @@ subdirs-$(CONFIG_CPU_X86_LAPIC) += lapic subdirs-$(CONFIG_CPU_X86_MTRR) += mtrr subdirs-$(CONFIG_CPU_X86_SMM) += smm +subdirs-$(CONFIG_CPU_X86_TSC) += tsc subdirs-$(CONFIG_PARALLEL_MP) += name ramstage-$(CONFIG_PARALLEL_MP) += mp_init.c ramstage-y += backup_default_smm.c diff --git a/src/soc/amd/picasso/Kconfig b/src/soc/amd/picasso/Kconfig index e6ed611..dcb9cae 100644 --- a/src/soc/amd/picasso/Kconfig +++ b/src/soc/amd/picasso/Kconfig @@ -16,6 +16,7 @@ select CPU_X86_LAPIC select CPU_X86_MTRR select CPU_X86_SMM + select CPU_X86_TSC select RESET_VECTOR_IN_RAM select X86_AMD_FIXED_MTRRS select X86_AMD_INIT_SIPI diff --git a/src/soc/amd/picasso/Makefile.inc b/src/soc/amd/picasso/Makefile.inc index b293eb6..bb1d7b1 100644 --- a/src/soc/amd/picasso/Makefile.inc +++ b/src/soc/amd/picasso/Makefile.inc @@ -3,7 +3,6 @@ ifeq ($(CONFIG_SOC_AMD_PICASSO),y)
subdirs-y += ../../../cpu/amd/mtrr/ -subdirs-y += ../../../cpu/x86/tsc subdirs-y += ../../../cpu/x86/pae subdirs-$(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK) += psp_verstage
diff --git a/src/soc/amd/stoneyridge/Kconfig b/src/soc/amd/stoneyridge/Kconfig index 59d2be5..64aec1f 100644 --- a/src/soc/amd/stoneyridge/Kconfig +++ b/src/soc/amd/stoneyridge/Kconfig @@ -16,6 +16,7 @@ select CPU_X86_LAPIC select CPU_X86_MTRR select CPU_X86_SMM + select CPU_X86_TSC select X86_AMD_FIXED_MTRRS select ACPI_AMD_HARDWARE_SLEEP_VALUES select COLLECT_TIMESTAMPS_NO_TSC diff --git a/src/soc/amd/stoneyridge/Makefile.inc b/src/soc/amd/stoneyridge/Makefile.inc index 231f0d9..06270a2 100644 --- a/src/soc/amd/stoneyridge/Makefile.inc +++ b/src/soc/amd/stoneyridge/Makefile.inc @@ -3,7 +3,6 @@ ifeq ($(CONFIG_SOC_AMD_STONEYRIDGE),y)
subdirs-y += ../../../cpu/amd/mtrr/ -subdirs-y += ../../../cpu/x86/tsc subdirs-y += ../../../cpu/x86/pae
bootblock-$(CONFIG_STONEYRIDGE_UART) += uart.c diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig index 1b2337f..2358677 100644 --- a/src/soc/intel/apollolake/Kconfig +++ b/src/soc/intel/apollolake/Kconfig @@ -32,6 +32,7 @@ select CPU_X86_LAPIC select CPU_X86_MTRR select CPU_X86_SMM + select CPU_X86_TSC select IOAPIC select PCR_COMMON_IOSF_1_0 select SMP diff --git a/src/soc/intel/apollolake/Makefile.inc b/src/soc/intel/apollolake/Makefile.inc index 1058cf2..9450339 100644 --- a/src/soc/intel/apollolake/Makefile.inc +++ b/src/soc/intel/apollolake/Makefile.inc @@ -3,7 +3,6 @@ subdirs-y += ../../../cpu/intel/common subdirs-y += ../../../cpu/intel/microcode subdirs-y += ../../../cpu/intel/turbo -subdirs-y += ../../../cpu/x86/tsc
bootblock-y += bootblock/bootblock.c bootblock-$(CONFIG_FSP_CAR) += fspcar.c diff --git a/src/soc/intel/baytrail/Kconfig b/src/soc/intel/baytrail/Kconfig index 1f7a804..ed5cc90 100644 --- a/src/soc/intel/baytrail/Kconfig +++ b/src/soc/intel/baytrail/Kconfig @@ -17,6 +17,7 @@ select CPU_X86_LAPIC select CPU_X86_MTRR select CPU_X86_SMM + select CPU_X86_TSC select CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED select SUPPORT_CPU_UCODE_IN_CBFS select HAVE_SMI_HANDLER diff --git a/src/soc/intel/baytrail/Makefile.inc b/src/soc/intel/baytrail/Makefile.inc index fa8519e..771f9d4 100644 --- a/src/soc/intel/baytrail/Makefile.inc +++ b/src/soc/intel/baytrail/Makefile.inc @@ -1,7 +1,6 @@ ifeq ($(CONFIG_SOC_INTEL_BAYTRAIL),y)
subdirs-y += romstage -subdirs-y += ../../../cpu/x86/tsc subdirs-y += ../../../cpu/intel/microcode subdirs-y += ../../../cpu/intel/turbo subdirs-y += ../../../cpu/intel/common diff --git a/src/soc/intel/braswell/Kconfig b/src/soc/intel/braswell/Kconfig index c5ff0fa..1177292 100644 --- a/src/soc/intel/braswell/Kconfig +++ b/src/soc/intel/braswell/Kconfig @@ -17,6 +17,7 @@ select CPU_X86_LAPIC select CPU_X86_MTRR select CPU_X86_SMM + select CPU_X86_TSC select SUPPORT_CPU_UCODE_IN_CBFS select CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED select HAVE_SMI_HANDLER diff --git a/src/soc/intel/braswell/Makefile.inc b/src/soc/intel/braswell/Makefile.inc index df52b7f..4ecb4e7 100644 --- a/src/soc/intel/braswell/Makefile.inc +++ b/src/soc/intel/braswell/Makefile.inc @@ -1,7 +1,6 @@ ifeq ($(CONFIG_SOC_INTEL_BRASWELL),y)
subdirs-y += romstage -subdirs-y += ../../../cpu/x86/tsc subdirs-y += ../../../cpu/intel/microcode subdirs-y += ../../../cpu/intel/turbo subdirs-y += ../../../cpu/intel/common diff --git a/src/soc/intel/broadwell/Kconfig b/src/soc/intel/broadwell/Kconfig index bd810ad..2473728 100644 --- a/src/soc/intel/broadwell/Kconfig +++ b/src/soc/intel/broadwell/Kconfig @@ -20,6 +20,7 @@ select CPU_X86_LAPIC select CPU_X86_MTRR select CPU_X86_SMM + select CPU_X86_TSC select SUPPORT_CPU_UCODE_IN_CBFS select HAVE_SMI_HANDLER select SOUTHBRIDGE_INTEL_COMMON_RESET diff --git a/src/soc/intel/broadwell/Makefile.inc b/src/soc/intel/broadwell/Makefile.inc index 1a361e5..7932967 100644 --- a/src/soc/intel/broadwell/Makefile.inc +++ b/src/soc/intel/broadwell/Makefile.inc @@ -1,7 +1,6 @@ ifeq ($(CONFIG_SOC_INTEL_BROADWELL),y)
subdirs-y += romstage -subdirs-y += ../../../cpu/x86/tsc subdirs-y += ../../../cpu/intel/microcode subdirs-y += ../../../cpu/intel/turbo subdirs-y += ../../../cpu/intel/common diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig index 9c7bad9..20482d0 100644 --- a/src/soc/intel/cannonlake/Kconfig +++ b/src/soc/intel/cannonlake/Kconfig @@ -70,6 +70,7 @@ select CPU_X86_LAPIC select CPU_X86_MTRR select CPU_X86_SMM + select CPU_X86_TSC select FSP_COMPRESS_FSP_S_LZMA select FSP_M_XIP select GENERIC_GPIO_LIB diff --git a/src/soc/intel/cannonlake/Makefile.inc b/src/soc/intel/cannonlake/Makefile.inc index c4ef987..bf57e94 100644 --- a/src/soc/intel/cannonlake/Makefile.inc +++ b/src/soc/intel/cannonlake/Makefile.inc @@ -3,7 +3,6 @@ subdirs-y += romstage subdirs-y += ../../../cpu/intel/microcode subdirs-y += ../../../cpu/intel/turbo -subdirs-y += ../../../cpu/x86/tsc subdirs-y += ../../../cpu/intel/common
bootblock-y += bootblock/bootblock.c diff --git a/src/soc/intel/denverton_ns/Kconfig b/src/soc/intel/denverton_ns/Kconfig index 18dba59..a9899be 100644 --- a/src/soc/intel/denverton_ns/Kconfig +++ b/src/soc/intel/denverton_ns/Kconfig @@ -18,6 +18,7 @@ select CPU_X86_LAPIC select CPU_X86_MTRR select CPU_X86_SMM + select CPU_X86_TSC select DEBUG_GPIO select SOC_INTEL_COMMON select SOC_INTEL_COMMON_RESET diff --git a/src/soc/intel/denverton_ns/Makefile.inc b/src/soc/intel/denverton_ns/Makefile.inc index 84dc846..73ac3b2 100644 --- a/src/soc/intel/denverton_ns/Makefile.inc +++ b/src/soc/intel/denverton_ns/Makefile.inc @@ -4,7 +4,6 @@
subdirs-y += ../../../cpu/intel/microcode subdirs-y += ../../../cpu/intel/turbo -subdirs-y += ../../../cpu/x86/tsc
bootblock-y += bootblock/bootblock.c bootblock-y += spi.c diff --git a/src/soc/intel/icelake/Kconfig b/src/soc/intel/icelake/Kconfig index b6453cd..00ac262 100644 --- a/src/soc/intel/icelake/Kconfig +++ b/src/soc/intel/icelake/Kconfig @@ -19,6 +19,7 @@ select CPU_X86_LAPIC select CPU_X86_MTRR select CPU_X86_SMM + select CPU_X86_TSC select FSP_M_XIP select GENERIC_GPIO_LIB select HAVE_FSP_GOP diff --git a/src/soc/intel/icelake/Makefile.inc b/src/soc/intel/icelake/Makefile.inc index 4d744bc..81ccb86 100644 --- a/src/soc/intel/icelake/Makefile.inc +++ b/src/soc/intel/icelake/Makefile.inc @@ -3,7 +3,6 @@ subdirs-y += romstage subdirs-y += ../../../cpu/intel/microcode subdirs-y += ../../../cpu/intel/turbo -subdirs-y += ../../../cpu/x86/tsc
# all (bootblock, verstage, romstage, postcar, ramstage) all-y += gspi.c diff --git a/src/soc/intel/jasperlake/Kconfig b/src/soc/intel/jasperlake/Kconfig index a3a673d..1527192 100644 --- a/src/soc/intel/jasperlake/Kconfig +++ b/src/soc/intel/jasperlake/Kconfig @@ -20,6 +20,7 @@ select CPU_X86_LAPIC select CPU_X86_MTRR select CPU_X86_SMM + select CPU_X86_TSC select FSP_COMPRESS_FSP_S_LZ4 select FSP_M_XIP select GENERIC_GPIO_LIB diff --git a/src/soc/intel/jasperlake/Makefile.inc b/src/soc/intel/jasperlake/Makefile.inc index 8262c32..72a6906 100644 --- a/src/soc/intel/jasperlake/Makefile.inc +++ b/src/soc/intel/jasperlake/Makefile.inc @@ -3,7 +3,6 @@ subdirs-y += romstage subdirs-y += ../../../cpu/intel/microcode subdirs-y += ../../../cpu/intel/turbo -subdirs-y += ../../../cpu/x86/tsc
# all (bootblock, verstage, romstage, postcar, ramstage) all-y += gspi.c diff --git a/src/soc/intel/quark/Kconfig b/src/soc/intel/quark/Kconfig index fa6861e..ada39da 100644 --- a/src/soc/intel/quark/Kconfig +++ b/src/soc/intel/quark/Kconfig @@ -14,6 +14,7 @@ select ARCH_ROMSTAGE_X86_32 select ARCH_VERSTAGE_X86_32 select CPU_X86_MTRR + select CPU_X86_TSC select NO_MMCONF_SUPPORT select REG_SCRIPT select PLATFORM_USES_FSP2_0 diff --git a/src/soc/intel/quark/Makefile.inc b/src/soc/intel/quark/Makefile.inc index 5800e04..8b0c8bf 100644 --- a/src/soc/intel/quark/Makefile.inc +++ b/src/soc/intel/quark/Makefile.inc @@ -3,7 +3,6 @@ ifeq ($(CONFIG_SOC_INTEL_QUARK),y)
subdirs-y += romstage -subdirs-y += ../../../cpu/x86/tsc
bootblock-y += bootblock/esram_init.S bootblock-y += bootblock/bootblock.c diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig index a753db8..834cbe0 100644 --- a/src/soc/intel/skylake/Kconfig +++ b/src/soc/intel/skylake/Kconfig @@ -32,6 +32,7 @@ select CPU_X86_LAPIC select CPU_X86_MTRR select CPU_X86_SMM + select CPU_X86_TSC select FSP_M_XIP select GENERIC_GPIO_LIB select HAVE_FSP_GOP diff --git a/src/soc/intel/skylake/Makefile.inc b/src/soc/intel/skylake/Makefile.inc index 9dbfa26..41ceeac 100644 --- a/src/soc/intel/skylake/Makefile.inc +++ b/src/soc/intel/skylake/Makefile.inc @@ -5,7 +5,6 @@ subdirs-y += ../../../cpu/intel/common subdirs-y += ../../../cpu/intel/microcode subdirs-y += ../../../cpu/intel/turbo -subdirs-y += ../../../cpu/x86/tsc
bootblock-y += bootblock/bootblock.c bootblock-y += bootblock/cpu.c diff --git a/src/soc/intel/tigerlake/Kconfig b/src/soc/intel/tigerlake/Kconfig index c3105c8..f902d8e 100644 --- a/src/soc/intel/tigerlake/Kconfig +++ b/src/soc/intel/tigerlake/Kconfig @@ -20,6 +20,7 @@ select CPU_X86_LAPIC select CPU_X86_MTRR select CPU_X86_SMM + select CPU_X86_TSC select FSP_COMPRESS_FSP_S_LZ4 select FSP_M_XIP select GENERIC_GPIO_LIB diff --git a/src/soc/intel/tigerlake/Makefile.inc b/src/soc/intel/tigerlake/Makefile.inc index 848a5b0..65d9976 100644 --- a/src/soc/intel/tigerlake/Makefile.inc +++ b/src/soc/intel/tigerlake/Makefile.inc @@ -3,7 +3,6 @@ subdirs-y += romstage subdirs-y += ../../../cpu/intel/microcode subdirs-y += ../../../cpu/intel/turbo -subdirs-y += ../../../cpu/x86/tsc
# all (bootblock, verstage, romstage, postcar, ramstage) all-y += gspi.c diff --git a/src/soc/intel/xeon_sp/Kconfig b/src/soc/intel/xeon_sp/Kconfig index 7ab0ed0..4f420e2 100644 --- a/src/soc/intel/xeon_sp/Kconfig +++ b/src/soc/intel/xeon_sp/Kconfig @@ -33,6 +33,7 @@ select BOOT_DEVICE_SUPPORTS_WRITES select CPU_X86_LAPIC select CPU_X86_MTRR + select CPU_X86_TSC select POSTCAR_CONSOLE select SOC_INTEL_COMMON select SOC_INTEL_COMMON_RESET diff --git a/src/soc/intel/xeon_sp/cpx/Makefile.inc b/src/soc/intel/xeon_sp/cpx/Makefile.inc index 59ca104..ec8d791 100644 --- a/src/soc/intel/xeon_sp/cpx/Makefile.inc +++ b/src/soc/intel/xeon_sp/cpx/Makefile.inc @@ -3,7 +3,6 @@ ifeq ($(CONFIG_SOC_INTEL_COOPERLAKE_SP),y)
subdirs-y += ../../../../cpu/intel/turbo -subdirs-y += ../../../../cpu/x86/tsc subdirs-y += ../../../../cpu/intel/microcode
romstage-y += romstage.c diff --git a/src/soc/intel/xeon_sp/skx/Makefile.inc b/src/soc/intel/xeon_sp/skx/Makefile.inc index 7d4ece7..2149115 100644 --- a/src/soc/intel/xeon_sp/skx/Makefile.inc +++ b/src/soc/intel/xeon_sp/skx/Makefile.inc @@ -4,7 +4,6 @@
subdirs-y += ../../../../cpu/intel/microcode subdirs-y += ../../../../cpu/intel/turbo -subdirs-y += ../../../../cpu/x86/tsc
postcar-y += soc_util.c
Hello build bot (Jenkins), David Guckian, Patrick Georgi, Martin Roth, Vanessa Eusebio, Andrey Petrov, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/44232
to look at the new patch set (#2).
Change subject: cpu/x86: Introduce `CPU_X86_TSC` ......................................................................
cpu/x86: Introduce `CPU_X86_TSC`
There's no need for relative paths with Kconfig options.
Change-Id: Ie7d8229d23b3fa515e56f4a4541b246ac7a6fbc1 Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/cpu/amd/agesa/family14/Kconfig M src/cpu/amd/agesa/family14/Makefile.inc M src/cpu/amd/agesa/family15tn/Kconfig M src/cpu/amd/agesa/family15tn/Makefile.inc M src/cpu/amd/agesa/family16kb/Kconfig M src/cpu/amd/agesa/family16kb/Makefile.inc M src/cpu/amd/pi/00630F01/Kconfig M src/cpu/amd/pi/00630F01/Makefile.inc M src/cpu/amd/pi/00660F01/Kconfig M src/cpu/amd/pi/00660F01/Makefile.inc M src/cpu/amd/pi/00730F01/Kconfig M src/cpu/amd/pi/00730F01/Makefile.inc M src/cpu/intel/haswell/Kconfig M src/cpu/intel/haswell/Makefile.inc M src/cpu/intel/model_2065x/Kconfig M src/cpu/intel/model_2065x/Makefile.inc M src/cpu/intel/model_206ax/Kconfig M src/cpu/intel/model_206ax/Makefile.inc M src/cpu/intel/slot_1/Kconfig M src/cpu/intel/slot_1/Makefile.inc M src/cpu/intel/socket_441/Kconfig M src/cpu/intel/socket_441/Makefile.inc M src/cpu/intel/socket_BGA956/Kconfig M src/cpu/intel/socket_BGA956/Makefile.inc M src/cpu/intel/socket_FCBGA559/Kconfig M src/cpu/intel/socket_FCBGA559/Makefile.inc M src/cpu/intel/socket_LGA775/Kconfig M src/cpu/intel/socket_LGA775/Makefile.inc M src/cpu/intel/socket_m/Kconfig M src/cpu/intel/socket_m/Makefile.inc M src/cpu/intel/socket_mPGA604/Kconfig M src/cpu/intel/socket_mPGA604/Makefile.inc M src/cpu/intel/socket_p/Kconfig M src/cpu/intel/socket_p/Makefile.inc M src/cpu/qemu-x86/Kconfig M src/cpu/qemu-x86/Makefile.inc M src/cpu/x86/Kconfig M src/cpu/x86/Makefile.inc M src/soc/amd/picasso/Kconfig M src/soc/amd/picasso/Makefile.inc M src/soc/amd/stoneyridge/Kconfig M src/soc/amd/stoneyridge/Makefile.inc M src/soc/intel/apollolake/Kconfig M src/soc/intel/apollolake/Makefile.inc M src/soc/intel/baytrail/Kconfig M src/soc/intel/baytrail/Makefile.inc M src/soc/intel/braswell/Kconfig M src/soc/intel/braswell/Makefile.inc M src/soc/intel/broadwell/Kconfig M src/soc/intel/broadwell/Makefile.inc M src/soc/intel/cannonlake/Kconfig M src/soc/intel/cannonlake/Makefile.inc M src/soc/intel/denverton_ns/Kconfig M src/soc/intel/denverton_ns/Makefile.inc M src/soc/intel/icelake/Kconfig M src/soc/intel/icelake/Makefile.inc M src/soc/intel/jasperlake/Kconfig M src/soc/intel/jasperlake/Makefile.inc M src/soc/intel/quark/Kconfig M src/soc/intel/quark/Makefile.inc M src/soc/intel/skylake/Kconfig M src/soc/intel/skylake/Makefile.inc M src/soc/intel/tigerlake/Kconfig M src/soc/intel/tigerlake/Makefile.inc M src/soc/intel/xeon_sp/Kconfig M src/soc/intel/xeon_sp/cpx/Makefile.inc M src/soc/intel/xeon_sp/skx/Makefile.inc 67 files changed, 37 insertions(+), 34 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/32/44232/2
Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44232 )
Change subject: cpu/x86: Introduce `CPU_X86_TSC` ......................................................................
Patch Set 3: Code-Review-1
(1 comment)
This sort of duplicates an existing Kconfig option
https://review.coreboot.org/c/coreboot/+/44232/3/src/cpu/x86/Kconfig File src/cpu/x86/Kconfig:
https://review.coreboot.org/c/coreboot/+/44232/3/src/cpu/x86/Kconfig@17 PS3, Line 17: CPU_X86_TSC The code is only included if UDELAY_TSC is you now need UDELAY_TSC and this new one to actually use the code. Maybe just include the code if UDELAY_TSC is set?
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44232 )
Change subject: cpu/x86: Introduce `CPU_X86_TSC` ......................................................................
Patch Set 3:
(1 comment)
https://review.coreboot.org/c/coreboot/+/44232/3/src/cpu/x86/Kconfig File src/cpu/x86/Kconfig:
https://review.coreboot.org/c/coreboot/+/44232/3/src/cpu/x86/Kconfig@17 PS3, Line 17: CPU_X86_TSC
The code is only included if UDELAY_TSC is you now need UDELAY_TSC and this new one to actually use […]
I'll try to do this. Let's hope that things don't break. It might be easier to do it in a follow-up.
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44232 )
Change subject: cpu/x86: Introduce `CPU_X86_TSC` ......................................................................
Patch Set 3:
(1 comment)
https://review.coreboot.org/c/coreboot/+/44232/3/src/cpu/x86/Kconfig File src/cpu/x86/Kconfig:
https://review.coreboot.org/c/coreboot/+/44232/3/src/cpu/x86/Kconfig@17 PS3, Line 17: CPU_X86_TSC
I'll try to do this. Let's hope that things don't break. It might be easier to do it in a follow-up.
Uh, I think it's easier to make an immediate follow-up that drops this Kconfig option. Grepping for Makefile rules is annoying, and this patch is easy to verify.
Hello build bot (Jenkins), David Guckian, Patrick Georgi, Martin Roth, Vanessa Eusebio, Arthur Heymans, Andrey Petrov, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/44232
to look at the new patch set (#4).
Change subject: cpu/x86: Temporarily introduce `CPU_X86_TSC` ......................................................................
cpu/x86: Temporarily introduce `CPU_X86_TSC`
There's no need for relative paths with Kconfig options. This symbol is redundant, though: Currently, `UDELAY_TSC` does the same, so it will be removed in subsequent commits in an easily-verifiable way.
Change-Id: Ie7d8229d23b3fa515e56f4a4541b246ac7a6fbc1 Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/cpu/amd/agesa/family14/Kconfig M src/cpu/amd/agesa/family14/Makefile.inc M src/cpu/amd/agesa/family15tn/Kconfig M src/cpu/amd/agesa/family15tn/Makefile.inc M src/cpu/amd/agesa/family16kb/Kconfig M src/cpu/amd/agesa/family16kb/Makefile.inc M src/cpu/amd/pi/00630F01/Kconfig M src/cpu/amd/pi/00630F01/Makefile.inc M src/cpu/amd/pi/00660F01/Kconfig M src/cpu/amd/pi/00660F01/Makefile.inc M src/cpu/amd/pi/00730F01/Kconfig M src/cpu/amd/pi/00730F01/Makefile.inc M src/cpu/intel/haswell/Kconfig M src/cpu/intel/haswell/Makefile.inc M src/cpu/intel/model_2065x/Kconfig M src/cpu/intel/model_2065x/Makefile.inc M src/cpu/intel/model_206ax/Kconfig M src/cpu/intel/model_206ax/Makefile.inc M src/cpu/intel/slot_1/Kconfig M src/cpu/intel/slot_1/Makefile.inc M src/cpu/intel/socket_441/Kconfig M src/cpu/intel/socket_441/Makefile.inc M src/cpu/intel/socket_BGA956/Kconfig M src/cpu/intel/socket_BGA956/Makefile.inc M src/cpu/intel/socket_FCBGA559/Kconfig M src/cpu/intel/socket_FCBGA559/Makefile.inc M src/cpu/intel/socket_LGA775/Kconfig M src/cpu/intel/socket_LGA775/Makefile.inc M src/cpu/intel/socket_m/Kconfig M src/cpu/intel/socket_m/Makefile.inc M src/cpu/intel/socket_mPGA604/Kconfig M src/cpu/intel/socket_mPGA604/Makefile.inc M src/cpu/intel/socket_p/Kconfig M src/cpu/intel/socket_p/Makefile.inc M src/cpu/qemu-x86/Kconfig M src/cpu/qemu-x86/Makefile.inc M src/cpu/x86/Kconfig M src/cpu/x86/Makefile.inc M src/soc/amd/picasso/Kconfig M src/soc/amd/picasso/Makefile.inc M src/soc/amd/stoneyridge/Kconfig M src/soc/amd/stoneyridge/Makefile.inc M src/soc/intel/apollolake/Kconfig M src/soc/intel/apollolake/Makefile.inc M src/soc/intel/baytrail/Kconfig M src/soc/intel/baytrail/Makefile.inc M src/soc/intel/braswell/Kconfig M src/soc/intel/braswell/Makefile.inc M src/soc/intel/broadwell/Kconfig M src/soc/intel/broadwell/Makefile.inc M src/soc/intel/cannonlake/Kconfig M src/soc/intel/cannonlake/Makefile.inc M src/soc/intel/denverton_ns/Kconfig M src/soc/intel/denverton_ns/Makefile.inc M src/soc/intel/icelake/Kconfig M src/soc/intel/icelake/Makefile.inc M src/soc/intel/jasperlake/Kconfig M src/soc/intel/jasperlake/Makefile.inc M src/soc/intel/quark/Kconfig M src/soc/intel/quark/Makefile.inc M src/soc/intel/skylake/Kconfig M src/soc/intel/skylake/Makefile.inc M src/soc/intel/tigerlake/Kconfig M src/soc/intel/tigerlake/Makefile.inc M src/soc/intel/xeon_sp/Kconfig M src/soc/intel/xeon_sp/cpx/Makefile.inc M src/soc/intel/xeon_sp/skx/Makefile.inc 67 files changed, 37 insertions(+), 34 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/32/44232/4
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44232 )
Change subject: cpu/x86: Temporarily introduce `CPU_X86_TSC` ......................................................................
Patch Set 4:
(1 comment)
https://review.coreboot.org/c/coreboot/+/44232/3/src/cpu/x86/Kconfig File src/cpu/x86/Kconfig:
https://review.coreboot.org/c/coreboot/+/44232/3/src/cpu/x86/Kconfig@17 PS3, Line 17: CPU_X86_TSC
Uh, I think it's easier to make an immediate follow-up that drops this Kconfig option. […]
I've created some follow-ups to clean up the thing. It felt easier to verify than a single change. Let me know what you think. Yes, I know I do things with more commits than strictly necessary, but I feel it would make things easier to review.
Oh, and I've updated the commit message of this change to explain I'm going to remove this new symbol in follow-ups.
Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44232 )
Change subject: cpu/x86: Temporarily introduce `CPU_X86_TSC` ......................................................................
Patch Set 4:
hmm, tbh I don't like introduction of a temporary Kconfig that gets removed two commits later...
Angel Pons has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/44232 )
Change subject: cpu/x86: Temporarily introduce `CPU_X86_TSC` ......................................................................
Abandoned
Sorry, I ran out of patience and energy to care about these changes any longer.
-
Angel Pons (Code Review) -
Arthur Heymans (Code Review)
-
Michael Niewöhner (Code Review)