HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/43707 )
Change subject: src/soc/intel: Add include <types.h> ......................................................................
src/soc/intel: Add include <types.h>
BIT(x) needs <types.h>.
Change-Id: I674e3e423e06ee869366ebbd7c9d4248a2f3d9d9 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/soc/intel/common/block/cpu/cpulib.c M src/soc/intel/tigerlake/chip.h 2 files changed, 2 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/07/43707/1
diff --git a/src/soc/intel/common/block/cpu/cpulib.c b/src/soc/intel/common/block/cpu/cpulib.c index 0cebe32..5b703cf 100644 --- a/src/soc/intel/common/block/cpu/cpulib.c +++ b/src/soc/intel/common/block/cpu/cpulib.c @@ -9,7 +9,7 @@ #include <intelblocks/fast_spi.h> #include <intelblocks/msr.h> #include <soc/soc_chip.h> -#include <stdint.h> +#include <types.h>
/* * Set PERF_CTL MSR (0x199) P_Req with diff --git a/src/soc/intel/tigerlake/chip.h b/src/soc/intel/tigerlake/chip.h index 59dab58..dcf668e 100644 --- a/src/soc/intel/tigerlake/chip.h +++ b/src/soc/intel/tigerlake/chip.h @@ -16,7 +16,7 @@ #include <soc/pmc.h> #include <soc/serialio.h> #include <soc/usb.h> -#include <stdint.h> +#include <types.h>
#define MAX_HD_AUDIO_DMIC_LINKS 2 #define MAX_HD_AUDIO_SNDW_LINKS 4
HAOUAS Elyes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43707 )
Change subject: src/soc/intel: Add include <types.h> ......................................................................
Patch Set 1:
(2 comments)
I've added comments to make the review easy
https://review.coreboot.org/c/coreboot/+/43707/1/src/soc/intel/common/block/... File src/soc/intel/common/block/cpu/cpulib.c:
https://review.coreboot.org/c/coreboot/+/43707/1/src/soc/intel/common/block/... PS1, Line 268: BIT(30) needs <types.h>
https://review.coreboot.org/c/coreboot/+/43707/1/src/soc/intel/tigerlake/chi... File src/soc/intel/tigerlake/chip.h:
https://review.coreboot.org/c/coreboot/+/43707/1/src/soc/intel/tigerlake/chi... PS1, Line 35: BIT(0) needs <types.h>
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43707 )
Change subject: src/soc/intel: Add include <types.h> ......................................................................
Patch Set 1: Code-Review+2
Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/43707 )
Change subject: src/soc/intel: Add include <types.h> ......................................................................
src/soc/intel: Add include <types.h>
BIT(x) needs <types.h>.
Change-Id: I674e3e423e06ee869366ebbd7c9d4248a2f3d9d9 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr Reviewed-on: https://review.coreboot.org/c/coreboot/+/43707 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Angel Pons th3fanbus@gmail.com --- M src/soc/intel/common/block/cpu/cpulib.c M src/soc/intel/tigerlake/chip.h 2 files changed, 2 insertions(+), 2 deletions(-)
Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved
diff --git a/src/soc/intel/common/block/cpu/cpulib.c b/src/soc/intel/common/block/cpu/cpulib.c index 0cebe32..5b703cf 100644 --- a/src/soc/intel/common/block/cpu/cpulib.c +++ b/src/soc/intel/common/block/cpu/cpulib.c @@ -9,7 +9,7 @@ #include <intelblocks/fast_spi.h> #include <intelblocks/msr.h> #include <soc/soc_chip.h> -#include <stdint.h> +#include <types.h>
/* * Set PERF_CTL MSR (0x199) P_Req with diff --git a/src/soc/intel/tigerlake/chip.h b/src/soc/intel/tigerlake/chip.h index 3d910ce..812dbac 100644 --- a/src/soc/intel/tigerlake/chip.h +++ b/src/soc/intel/tigerlake/chip.h @@ -16,7 +16,7 @@ #include <soc/pmc.h> #include <soc/serialio.h> #include <soc/usb.h> -#include <stdint.h> +#include <types.h>
#define MAX_HD_AUDIO_DMIC_LINKS 2 #define MAX_HD_AUDIO_SNDW_LINKS 4
-
Angel Pons (Code Review) -
HAOUAS Elyes (Code Review)
-
Patrick Georgi (Code Review)