Change in coreboot[master]: HACK: soc/mediatek/mt8192: Support sspm uart

[Yidi Lin (Code Review)]

Hello Erin Lo,

I'd like you to do a code review. Please visit

https://review.coreboot.org/c/coreboot/+/47349

to review the following change.

Change subject: HACK: soc/mediatek/mt8192: Support sspm uart
......................................................................

HACK: soc/mediatek/mt8192: Support sspm uart

After rework asurada board, switch gpio pinmux

Signed-off-by: Erin Lo 
Change-Id: Ief8410aee7e06c32040fbae87e2360cd0bb9d441
---
M src/soc/mediatek/mt8192/sspm.c
1 file changed, 5 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/49/47349/1

diff --git a/src/soc/mediatek/mt8192/sspm.c b/src/soc/mediatek/mt8192/sspm.c
index c9ed840..3fcc1e2 100755
--- a/src/soc/mediatek/mt8192/sspm.c
+++ b/src/soc/mediatek/mt8192/sspm.c
@@ -3,6 +3,7 @@
 #include <arch/barrier.h>
 #include <cbfs.h>
 #include <console/console.h>
+#include <soc/gpio.h>
 #include <device/mmio.h>
 #include <soc/sspm.h>
 #include <string.h>
@@ -24,6 +25,10 @@
    memcpy((void *)SSPM_SRAM_BASE, sspm_bin, fw_size);
    /* Memory barrier to ensure that all fw code is loaded
       before we release the reset pin. */
+
+	gpio_set_mode(GPIO(URXD1), 4);
+	gpio_set_mode(GPIO(UTXD1), 4);
+
    mb();
    write32(&mt8192_sspm->sw_rstn, 0x1);
 }

[Yidi Lin (Code Review)]

Hello build bot (Jenkins), Erin Lo,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/47349

to look at the new patch set (#6).

Change subject: HACK: soc/mediatek/mt8192: Support sspm uart
......................................................................

HACK: soc/mediatek/mt8192: Support sspm uart

After rework asurada board, switch gpio pinmux

Signed-off-by: Erin Lo 
Change-Id: Ief8410aee7e06c32040fbae87e2360cd0bb9d441
---
M src/soc/mediatek/mt8192/sspm.c
1 file changed, 5 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/49/47349/6

[Yidi Lin (Code Review)]

Yidi Lin has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/47349 )

Change subject: HACK: soc/mediatek/mt8192: Support sspm uart
......................................................................

Abandoned

test only