Change in coreboot[master]: mb/google/zork: Adjust Dirinboz H1 I2C CLK

[Kevin Chiu (Code Review)]

Kevin Chiu has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/50284 )

Change subject: mb/google/zork: Adjust Dirinboz H1 I2C CLK
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mb/google/zork: Adjust Dirinboz H1 I2C CLK

Adjust H1 I2C CLK:
404kHz -> 391 kHz

BUG=b:164757545
BRANCH=master
TEST=1. emerge-zork coreboot chromeos-bootimage
     2. power on proto board successfully
     3. measure i2c freq by scope is close to 400kHz

Change-Id: I9067db9fc7a4d6aa2ce33b86ba6a611dfd5d7838
Signed-off-by: Kevin Chiu 
---
M src/mainboard/google/zork/variants/dirinboz/overridetree.cb
1 file changed, 2 insertions(+), 2 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/84/50284/1

diff --git a/src/mainboard/google/zork/variants/dirinboz/overridetree.cb b/src/mainboard/google/zork/variants/dirinboz/overridetree.cb
index a990a23..d1c742d 100644
--- a/src/mainboard/google/zork/variants/dirinboz/overridetree.cb
+++ b/src/mainboard/google/zork/variants/dirinboz/overridetree.cb
@@ -90,8 +90,8 @@
    # I2C3 for H1
    register "i2c[3]" = "{
    	.speed = I2C_SPEED_FAST,
-		.rise_time_ns = 184, /* 0 to 1.26v (1.8 * .7) */
-		.fall_time_ns = 42,  /* 1.26v to 0 */
+		.rise_time_ns = 98, /* 0 to 1.26v (1.8 * .7) */
+		.fall_time_ns = 17,  /* 1.26v to 0 */
    	.early_init = true,
    }"