Attention is currently required from: Hung-Te Lin, Jarried Lin, Kenji Yu, Yu-Ping Wu.
Yidi Lin has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/85516?usp=email )
Change subject: soc/mediatek/mt8196: Initialize SSPM ......................................................................
Patch Set 11:
(3 comments)
File src/soc/mediatek/mt8196/include/soc/mt8196_sspm.h:
https://review.coreboot.org/c/coreboot/+/85516/comment/2402375b_4fa8826a?usp... : PS11, Line 6: #include <soc/addressmap.h> : : #define SSPM_SRAM_CON (SPM_BASE + 0xEE4) : #define SPM_PRJ_CODE 0xB160001 : #define SSPM_SRAM_SLEEP_B 0x10 : #define SSPM_SRAM_ISOINT_B 0x2 Move to `mt8196/sspm_sram.c`.
https://review.coreboot.org/c/coreboot/+/85516/comment/51fe9d4f_c09ff629?usp... : PS11, Line 13: void sspm_enable_sram(void); 1. Move to `common/soc/include/sspm.h` 2. Add a weak function in `common/sspm.c` ``` __weak void sspm_enable_sram(void) { /* do nothing */ } ```
in `common/sspm.c`
``` void sspm_init() { sspm_enable_sram(); ... ... } ```
File src/soc/mediatek/mt8196/sspm.c:
https://review.coreboot.org/c/coreboot/+/85516/comment/f3b64c47_36027286?usp... : PS11, Line 4: mt8196_sspm sspm.h