Change in coreboot[master]: soc/intel/adl/chip.h: add unit in max_dram_speed

[Scott Chao (Code Review)]

Scott Chao has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/63735 )

Change subject: soc/intel/adl/chip.h: add unit in max_dram_speed
......................................................................

soc/intel/adl/chip.h: add unit in max_dram_speed

BUG=b:229549930
BRANCH=none
TEST=build coreboot without error

Signed-off-by: Scott Chao 
Change-Id: I83c780440613050c0202f95d5f64991b61d9c280
---
M src/mainboard/google/brya/variants/crota/overridetree.cb
M src/mainboard/google/brya/variants/primus/overridetree.cb
M src/mainboard/google/brya/variants/primus4es/overridetree.cb
M src/soc/intel/alderlake/chip.h
M src/soc/intel/alderlake/romstage/fsp_params.c
5 files changed, 6 insertions(+), 6 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/35/63735/1

diff --git a/src/mainboard/google/brya/variants/crota/overridetree.cb b/src/mainboard/google/brya/variants/crota/overridetree.cb
index 5a48a5e..040075e 100644
--- a/src/mainboard/google/brya/variants/crota/overridetree.cb
+++ b/src/mainboard/google/brya/variants/crota/overridetree.cb
@@ -19,7 +19,7 @@

chip soc/intel/alderlake

-	register "max_dram_speed" = "4800"
+	register "max_dram_speed_mts" = "4800"

# Acoustic settings
    register "acoustic_noise_mitigation" = "1"
diff --git a/src/mainboard/google/brya/variants/primus/overridetree.cb b/src/mainboard/google/brya/variants/primus/overridetree.cb
index 8fc1f14..80a456b 100644
--- a/src/mainboard/google/brya/variants/primus/overridetree.cb
+++ b/src/mainboard/google/brya/variants/primus/overridetree.cb
@@ -24,7 +24,7 @@

chip soc/intel/alderlake
    register "sagv" = "SaGv_Enabled"
-	register "max_dram_speed" = "3733"
+	register "max_dram_speed_mts" = "3733"

# Acoustic settings
    register "acoustic_noise_mitigation" = "1"
diff --git a/src/mainboard/google/brya/variants/primus4es/overridetree.cb b/src/mainboard/google/brya/variants/primus4es/overridetree.cb
index d56cc06..bd63a43 100644
--- a/src/mainboard/google/brya/variants/primus4es/overridetree.cb
+++ b/src/mainboard/google/brya/variants/primus4es/overridetree.cb
@@ -24,7 +24,7 @@

chip soc/intel/alderlake
    register "sagv" = "SaGv_Enabled"
-	register "max_dram_speed" = "3733"
+	register "max_dram_speed_mts" = "3733"

# Acoustic settings
    register "acoustic_noise_mitigation" = "1"
diff --git a/src/soc/intel/alderlake/chip.h b/src/soc/intel/alderlake/chip.h
index 8ee36f6..7934a86 100644
--- a/src/soc/intel/alderlake/chip.h
+++ b/src/soc/intel/alderlake/chip.h
@@ -484,7 +484,7 @@
    */
    struct vr_config domain_vr_config[NUM_VR_DOMAINS];

-	uint16_t max_dram_speed;
+	uint16_t max_dram_speed_mts;

enum {
    	SLP_S3_ASSERTION_DEFAULT,
diff --git a/src/soc/intel/alderlake/romstage/fsp_params.c b/src/soc/intel/alderlake/romstage/fsp_params.c
index 83ce074..863fc43 100644
--- a/src/soc/intel/alderlake/romstage/fsp_params.c
+++ b/src/soc/intel/alderlake/romstage/fsp_params.c
@@ -141,8 +141,8 @@
 {
    m_cfg->SaGv = config->sagv;
    m_cfg->RMT = config->RMT;
-	if (config->max_dram_speed)
-		m_cfg->DdrFreqLimit = config->max_dram_speed;
+	if (config->max_dram_speed_mts)
+		m_cfg->DdrFreqLimit = config->max_dram_speed_mts;
 }

static void fill_fspm_cpu_params(FSP_M_CONFIG *m_cfg,