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Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61650 )
Change subject: soc/intel/skylake: Add function to clear PMCON status bits
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Patch Set 3:
(1 comment)
File src/soc/intel/skylake/pmc.c:
https://review.coreboot.org/c/coreboot/+/61650/comment/876cbe20_22d948ef
PS3, Line 99: pci_or_config32(dev, GEN_PMCON_A, 0);
Sorry, not sure what you mean. pmc_soc_init runs way before finalize, so this one here clears bit 18 and it will be clear already in finalize. Correct me if I'm wrong, please
What I meant is like assume you have cleared the all rst bit as part of pmc.c file but FSP asked for a global reset at later stage, then we don't have a code in finalize.c which does the cleaning part again. Hence, I have requested to delay this clearing at the end of the boot, when we know, no one can issue global reset post that stage.
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