Attention is currently required from: Felix Held, Fred Reitberger, Jason Glenesk, Matt DeVillier, Zheng Bao.
Hello Zheng Bao,
I'd like you to do a code review. Please visit
https://review.coreboot.org/c/coreboot/+/85650?usp=email
to review the following change.
Change subject: soc/amd: Add some PSP commands ......................................................................
soc/amd: Add some PSP commands
Add getting and setting boot partition. Add toggle boot partition.
Change-Id: Ia7f2eedae5b277745cb34a0761bd1a8b61441695 Signed-off-by: Zheng Bao fishbaozi@gmail.com --- M src/soc/amd/common/block/psp/Makefile.mk M src/soc/amd/common/block/psp/psp_def.h M src/soc/amd/common/block/psp/psp_gen2.c M src/soc/amd/glinda/Kconfig M src/soc/amd/glinda/Makefile.mk M src/soc/amd/phoenix/Kconfig M src/soc/amd/phoenix/Makefile.mk 7 files changed, 131 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/50/85650/1
diff --git a/src/soc/amd/common/block/psp/Makefile.mk b/src/soc/amd/common/block/psp/Makefile.mk index 0761cba..150d406 100644 --- a/src/soc/amd/common/block/psp/Makefile.mk +++ b/src/soc/amd/common/block/psp/Makefile.mk @@ -27,6 +27,7 @@
romstage-y += psp_gen2.c ramstage-y += psp_gen2.c +bootblock-y += psp_gen2.c ramstage-$(CONFIG_PSP_PLATFORM_SECURE_BOOT) += psb.c ramstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_I2C3_TPM_SHARED_WITH_PSP) += tpm.c
diff --git a/src/soc/amd/common/block/psp/psp_def.h b/src/soc/amd/common/block/psp/psp_def.h index 9def98b..376d43d 100644 --- a/src/soc/amd/common/block/psp/psp_def.h +++ b/src/soc/amd/common/block/psp/psp_def.h @@ -6,6 +6,7 @@ #include <types.h> #include <commonlib/helpers.h> #include <amdblocks/psp.h> +#include <cbfs.h>
#define CORE_2_PSP_MSG_38_OFFSET 0x10998 /* 4 byte */ #define CORE_2_PSP_MSG_38_FUSE_SPL BIT(12) @@ -24,6 +25,8 @@ #define MBOX_BIOS_CMD_S3_DATA_INFO 0x08 #define MBOX_BIOS_CMD_NOP 0x09 #define MBOX_BIOS_CMD_PSB_AUTO_FUSING 0x21 +#define MBOX_BIOS_CMD_SET_BOOTPARTITION 0x26 +#define MBOX_BIOS_CMD_GET_BOOTPARTITION 0x36 #define MBOX_BIOS_CMD_SET_SPL_FUSE 0x2d #define MBOX_BIOS_CMD_QUERY_SPL_FUSE 0x47 #define MBOX_BIOS_CMD_I2C_TPM_ARBITRATION 0x64 @@ -88,6 +91,11 @@ uint32_t spl_value; } __packed __aligned(32);
+struct mbox_cmd_boot_partition_buffer { + struct mbox_buffer_header header; + uint32_t boot_partition; +} __packed __aligned(32); + struct dtpm_config { uint32_t gpio; } __packed; @@ -115,4 +123,14 @@
uint32_t soc_read_c2p38(void);
+void set_bootpartition(uint32_t partition); +uint32_t get_bootpartition(void); + +void set_corrupt_entry(uint8_t entry); +void set_boot_status(uint8_t ok); + +void toggle_bootpartition(void); + +void abrecovery_locate_area_as_rdev(struct region_device *rdev); + #endif /* __AMD_PSP_DEF_H__ */ diff --git a/src/soc/amd/common/block/psp/psp_gen2.c b/src/soc/amd/common/block/psp/psp_gen2.c index 0fffb17..07089dd 100644 --- a/src/soc/amd/common/block/psp/psp_gen2.c +++ b/src/soc/amd/common/block/psp/psp_gen2.c @@ -5,6 +5,9 @@ #include <amdblocks/psp.h> #include <amdblocks/smn.h> #include "psp_def.h" +#include <amdblocks/reset.h> +#include <fmap.h> +#include <pc80/mc146818rtc.h>
#define PSP_MAILBOX_COMMAND_OFFSET 0x10570 /* 4 bytes */ #define PSP_MAILBOX_BUFFER_L_OFFSET 0x10574 /* 4 bytes */ @@ -83,8 +86,9 @@
int send_psp_command(u32 command, void *buffer) { - if (rd_mbox_recovery()) - return -PSPSTS_RECOVERY; + if (command != MBOX_BIOS_CMD_SET_BOOTPARTITION && command != MBOX_BIOS_CMD_GET_BOOTPARTITION) + if (rd_mbox_recovery()) + return -PSPSTS_RECOVERY;
if (wait_command(true)) return -PSPSTS_CMD_TIMEOUT; @@ -110,6 +114,37 @@ return smn_read32(SMN_PSP_PUBLIC_BASE + CORE_2_PSP_MSG_38_OFFSET); }
+void set_bootpartition(uint32_t partition) +{ + struct mbox_cmd_boot_partition_buffer boot_partition_cmd = { + .header = { + .size = sizeof(boot_partition_cmd) + }, + }; + int cmd_status = 0; + + boot_partition_cmd.boot_partition = partition; + cmd_status = send_psp_command(MBOX_BIOS_CMD_SET_BOOTPARTITION, &boot_partition_cmd); + if (cmd_status != 0) + halt(); +} +uint32_t get_bootpartition(void) +{ + struct mbox_cmd_boot_partition_buffer boot_partition_cmd = { + .header = { + .size = sizeof(boot_partition_cmd) + }, + .boot_partition = 1 + }; + int cmd_status = 0; + + boot_partition_cmd.boot_partition = 0xFFFFFFFF; + cmd_status = send_psp_command(MBOX_BIOS_CMD_GET_BOOTPARTITION, &boot_partition_cmd); + if (cmd_status != 0) + halt(); + return boot_partition_cmd.boot_partition; +} + uint8_t check_abrecovery(void) { union pspv2_mbox_command tmp; @@ -117,3 +152,32 @@ tmp.val = smn_read32(SMN_PSP_PUBLIC_BASE + PSP_MAILBOX_COMMAND_OFFSET); return !!tmp.fields.recovery; } + +void toggle_bootpartition(void) +{ +// printk("toggle_bootpartition\n"); + set_bootpartition(1); + do_warm_reset(); + halt(); +} + +void set_corrupt_entry(uint8_t entry) +{ + cmos_write(entry, 1); +} + +void set_boot_status(uint8_t ok) +{ + cmos_write(cmos_read(0) | 0x02, 0); +} + +void abrecovery_locate_area_as_rdev(struct region_device *rdev) +{ + if (get_bootpartition() == 0) { + if (fmap_locate_area_as_rdev("COREBOOT", rdev)) + die("Cannot locate primary CBFS"); + } else { + if (fmap_locate_area_as_rdev("COREBOOTB", rdev)) + die("Cannot locate primary CBFS"); + } +} diff --git a/src/soc/amd/glinda/Kconfig b/src/soc/amd/glinda/Kconfig index 68a1b6f..89678c8 100644 --- a/src/soc/amd/glinda/Kconfig +++ b/src/soc/amd/glinda/Kconfig @@ -380,6 +380,13 @@ help Add psp_verstage signature token to the build & PSP Directory Table
+config PSP_AB_RECOVERY + bool "Use A/B Recovery scheme" + select CBFS_VERIFICATION + default y + help + Enable the PSP A/B Recovery mechanism + endmenu
config VBOOT diff --git a/src/soc/amd/glinda/Makefile.mk b/src/soc/amd/glinda/Makefile.mk index 7f48581..769911d 100644 --- a/src/soc/amd/glinda/Makefile.mk +++ b/src/soc/amd/glinda/Makefile.mk @@ -57,6 +57,14 @@
GLINDA_FW_B_POSITION=$(call int-add, \ $(call get_fmap_value,FMAP_SECTION_FW_MAIN_B_START) $(AMD_FW_AB_POSITION)) + +ifeq ($(CONFIG_PSP_AB_RECOVERY), y) +GLINDA_FW_A_RECOVERY=$(call int-add, \ + $(call get_fmap_value,FMAP_SECTION_PARTITIION_START) 4096) +GLINDA_FW_B_RECOVERY=$(call int-add, \ + $(call get_fmap_value,FMAP_SECTION_BCOPY_START) 4096) +endif + # # PSP Directory Table items # @@ -207,6 +215,12 @@ # If vboot uses 2 RW slots, then 2 copies of PSP binaries are redundant OPT_RECOVERY_AB_SINGLE_COPY=$(if $(CONFIG_VBOOT_SLOTS_RW_AB), --recovery-ab-single-copy)
+OPT_RECOVERY_AB=$(if $(CONFIG_PSP_AB_RECOVERY), --recovery-ab) +OPT_BIOS_AMDCOMPRESS=$(if $(CONFIG_CBFS_VERIFICATION), --elfcopy, --compress) +OPT_BIOS_FWCOMPRESS=$(if $(CONFIG_CBFS_VERIFICATION), --bios-bin-uncomp) + +OPT_RECOVERY_AB+=$(if $(CONFIG_PSP_AB_RECOVERY), --recovery-a-location $(call _tohex, $(GLINDA_FW_A_RECOVERY)) --recovery-b-location $(call _tohex, $(GLINDA_FW_B_RECOVERY))) + AMDFW_COMMON_ARGS=$(OPT_PSP_APCB_FILES) \ $(OPT_PSP_NVRAM_BASE) \ $(OPT_PSP_NVRAM_SIZE) \ @@ -228,6 +242,7 @@ $(OPT_EFS_SPI_READ_MODE) \ $(OPT_EFS_SPI_SPEED) \ $(OPT_EFS_SPI_MICRON_FLAG) \ + $(OPT_RECOVERY_AB) \ --config $(CONFIG_AMDFW_CONFIG_FILE) \ --flashsize $(CONFIG_ROM_SIZE) \ $(OPT_RECOVERY_AB_SINGLE_COPY) @@ -249,13 +264,14 @@ $(OPT_VERSTAGE_FILE) \ $(OPT_VERSTAGE_SIG_FILE) \ $(OPT_SPL_TABLE_FILE) \ + $(OPT_BIOS_FWCOMPRESS) \ --location $(CONFIG_AMD_FWM_POSITION) \ --output $@
$(PSP_BIOSBIN_FILE): $(PSP_ELF_FILE) $(AMDCOMPRESS) rm -f $@ @printf " AMDCOMPRS $(subst $(obj)/,,$(@))\n" - $(AMDCOMPRESS) --infile $(PSP_ELF_FILE) --outfile $@ --compress \ + $(AMDCOMPRESS) --infile $(PSP_ELF_FILE) --outfile $@ $(OPT_BIOS_AMDCOMPRESS) \ --maxsize $(PSP_BIOSBIN_SIZE)
$(obj)/amdfw_a.rom: $(obj)/amdfw.rom diff --git a/src/soc/amd/phoenix/Kconfig b/src/soc/amd/phoenix/Kconfig index 718db8f..bfc1075 100644 --- a/src/soc/amd/phoenix/Kconfig +++ b/src/soc/amd/phoenix/Kconfig @@ -384,6 +384,12 @@ help Add psp_verstage signature token to the build & PSP Directory Table
+config PSP_AB_RECOVERY + bool "Use A/B Recovery scheme" + select CBFS_VERIFICATION + default y + help + Enable the PSP A/B Recovery mechanism endmenu
config VBOOT diff --git a/src/soc/amd/phoenix/Makefile.mk b/src/soc/amd/phoenix/Makefile.mk index 7713fad..f1cb5ae 100644 --- a/src/soc/amd/phoenix/Makefile.mk +++ b/src/soc/amd/phoenix/Makefile.mk @@ -67,6 +67,13 @@
FMAP_FLASH_START=$(call get_fmap_value,FMAP_SECTION_FLASH_START)
+ifeq ($(CONFIG_PSP_AB_RECOVERY), y) +PHOENIX_FW_A_RECOVERY=$(call int-add, \ + $(call get_fmap_value,FMAP_SECTION_PARTITIION_START) 4096) +PHOENIX_FW_B_RECOVERY=$(call int-add, \ + $(call get_fmap_value,FMAP_SECTION_BCOPY_START) 4096) +endif + # # PSP Directory Table items # @@ -238,6 +245,12 @@ MANIFEST_FILE=$(obj)/amdfw_manifest OPT_MANIFEST=$(call add_opt_prefix, $(MANIFEST_FILE), --output-manifest)
+OPT_RECOVERY_AB=$(if $(CONFIG_PSP_AB_RECOVERY), --recovery-ab) +OPT_BIOS_AMDCOMPRESS=$(if $(CONFIG_CBFS_VERIFICATION), --elfcopy, --compress) +OPT_BIOS_FWCOMPRESS=$(if $(CONFIG_CBFS_VERIFICATION), --bios-bin-uncomp) + +OPT_RECOVERY_AB+=$(if $(CONFIG_PSP_AB_RECOVERY), --recovery-a-location $(call _tohex, $(PHOENIX_FW_A_RECOVERY)) --recovery-b-location $(call _tohex, $(PHOENIX_FW_B_RECOVERY))) + AMDFW_COMMON_ARGS=$(OPT_PSP_APCB_FILES) \ $(OPT_PSP_NVRAM_BASE) \ $(OPT_PSP_NVRAM_SIZE) \ @@ -259,6 +272,7 @@ $(OPT_EFS_SPI_READ_MODE) \ $(OPT_EFS_SPI_SPEED) \ $(OPT_EFS_SPI_MICRON_FLAG) \ + $(OPT_RECOVERY_AB) \ --config $(CONFIG_AMDFW_CONFIG_FILE) \ --flashsize $(CONFIG_ROM_SIZE) \ $(OPT_RECOVERY_AB_SINGLE_COPY) \ @@ -282,6 +296,7 @@ $(OPT_VERSTAGE_SIG_FILE) \ $(OPT_SPL_TABLE_FILE) \ $(OPT_MANIFEST) \ + $(OPT_BIOS_FWCOMPRESS) \ --location $(CONFIG_AMD_FWM_POSITION) \ --output $@
@@ -294,7 +309,7 @@ $(PSP_BIOSBIN_FILE): $(PSP_ELF_FILE) $(AMDCOMPRESS) rm -f $@ @printf " AMDCOMPRS $(subst $(obj)/,,$(@))\n" - $(AMDCOMPRESS) --infile $(PSP_ELF_FILE) --outfile $@ --compress \ + $(AMDCOMPRESS) --infile $(PSP_ELF_FILE) --outfile $@ $(OPT_BIOS_AMDCOMPRESS) \ --maxsize $(PSP_BIOSBIN_SIZE)
$(obj)/amdfw_a.rom: $(obj)/amdfw.rom
-
Bao Zheng (Code Review)