[XS] Change in coreboot[main]: soc/intel/pantherlake: Update the Thunderbolt lcap_port_base to 0x15

[Subrata Banik (Code Review)]

Attention is currently required from: Jérémy Compostella, Kapil Porwal, Pranava Y N.

Subrata Banik has posted comments on this change by Jérémy Compostella. ( https://review.coreboot.org/c/coreboot/+/85781?usp=email )

Change subject: soc/intel/pantherlake: Update the Thunderbolt lcap_port_base to 0x15
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Patch Set 1:

(1 comment)

Patchset:

PS1: 
looking at MTL IOE die I/O registers and PTL SOC die I/O registers for TBT, I don't see any difference in the register definitions to justify the CL. Can you please help me to understand which bit-field inside TBT.LCAP register you are referring here.