Change in coreboot[master]: soc/intel/common/fast_spi: support caching `ext_bios` in ramstage

[Subrata Banik (Code Review)]

Attention is currently required from: Subrata Banik, Paul Menzel, Tim Wawrzynczak, Angel Pons, Nick Vaccaro, Eric Lai, Werner Zeh.
Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62837 )

Change subject: soc/intel/common/fast_spi: support caching `ext_bios` in ramstage
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Patch Set 3:

(2 comments)

Commit Message:

https://review.coreboot.org/c/coreboot/+/62837/comment/e7b852a3_5568b5a6 
PS2, Line 9: This patch provides a way to cache ext_bios region for all stages.
> Why is that caching useful?

Ack

https://review.coreboot.org/c/coreboot/+/62837/comment/6a719ad2_b13e8446 
PS2, Line 11: TEST=Able to see ext_bios region in MTRR snapshot when cached.
> On what board? Any timing differences?

Ack