[M] Change in coreboot[main]: soc/amd/*: pass PSP RPMC NVRAM base and size to amdfwtool

[Felix Held (Code Review)]

Attention is currently required from: Felix Held, Fred Reitberger, Jason Glenesk.

Hello Fred Reitberger, Jason Glenesk, Marshall Dawson, Matt DeVillier, build bot (Jenkins),

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/83815?usp=email

to look at the new patch set (#4).

Change subject: soc/amd/*: pass PSP RPMC NVRAM base and size to amdfwtool
......................................................................

soc/amd/*: pass PSP RPMC NVRAM base and size to amdfwtool

Pass the PSP NVRAM base and size to amdfwtool for all SoCs except Genoa
and Stoneyridge which don't use/support this.

If a mainboard has an section named 'PSP_RPMC_NVRAM' in its FMAP file,
the start and length of it in the flash will be passed to amdfwtool
which then adds the base and length to the corresponding type 0x54 PSP
directory table entry.

Signed-off-by: Felix Held 
Change-Id: Id9f8a7eec68a5222be63e46173132f1c4a461b4f
---
M src/soc/amd/cezanne/Makefile.mk
M src/soc/amd/glinda/Makefile.mk
M src/soc/amd/mendocino/Makefile.mk
M src/soc/amd/phoenix/Makefile.mk
M src/soc/amd/picasso/Makefile.mk
5 files changed, 51 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/15/83815/4