Attention is currently required from: Reka Norman, Rizwan Qureshi, Tim Wawrzynczak, Krishna P Bhat D, Usha P.
Reka Norman has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61439 )
Change subject: mb/google/brya: Add memory config for nissa
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Patch Set 1:
(1 comment)
File src/mainboard/google/brya/variants/baseboard/nissa/memory.c:
https://review.coreboot.org/c/coreboot/+/61439/comment/a2eafb78_1231c19d
PS1, Line 21: ddr0
A question for Intel - ddr0-3 don't exist on ADL-N. I've just duplicated the values for ddr4-ddr7, since it seems like that's what `adln_lp5_mem_config` does. Is this correct?
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