Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/52790 )
Change subject: sb/intel/lynxpoint: Fix VBOOT with !CONFIG_INTEL_LYNXPOINT_LP ......................................................................
sb/intel/lynxpoint: Fix VBOOT with !CONFIG_INTEL_LYNXPOINT_LP
The Intel Basking Ridge CRB does not have a Lynxpoint LP PCH but was using the lp gpio code instead of the southbridge/intel/common code in verstage.
Change-Id: I775d3dc3540fbd8a939701d873183dd016e24ba4 Signed-off-by: Arthur Heymans arthur@aheymans.xyz Reviewed-on: https://review.coreboot.org/c/coreboot/+/52790 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Patrick Rudolph siro@das-labor.org Reviewed-by: Angel Pons th3fanbus@gmail.com --- M src/southbridge/intel/common/Makefile.inc M src/southbridge/intel/lynxpoint/Makefile.inc 2 files changed, 2 insertions(+), 1 deletion(-)
Approvals: build bot (Jenkins): Verified Patrick Rudolph: Looks good to me, approved Angel Pons: Looks good to me, approved
diff --git a/src/southbridge/intel/common/Makefile.inc b/src/southbridge/intel/common/Makefile.inc index adacc25..1fc3a63 100644 --- a/src/southbridge/intel/common/Makefile.inc +++ b/src/southbridge/intel/common/Makefile.inc @@ -27,6 +27,7 @@ ramstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG) += usb_debug.c
bootblock-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO) += gpio.c +verstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO) += gpio.c romstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO) += gpio.c ramstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO) += gpio.c smm-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO) += gpio.c diff --git a/src/southbridge/intel/lynxpoint/Makefile.inc b/src/southbridge/intel/lynxpoint/Makefile.inc index f980a65..9ffd764 100644 --- a/src/southbridge/intel/lynxpoint/Makefile.inc +++ b/src/southbridge/intel/lynxpoint/Makefile.inc @@ -41,10 +41,10 @@ romstage-y += lp_gpio.c ramstage-y += lp_gpio.c smm-y += lp_gpio.c +verstage-$(CONFIG_VBOOT_SEPARATE_VERSTAGE) += lp_gpio.c endif
verstage-$(CONFIG_VBOOT_SEPARATE_VERSTAGE) += pmutil.c -verstage-$(CONFIG_VBOOT_SEPARATE_VERSTAGE) += lp_gpio.c
CPPFLAGS_common += -I$(src)/southbridge/intel/lynxpoint/include