Attention is currently required from: Hung-Te Lin, Mengqi Zhang, Yidi Lin, Yu-Ping Wu.
Kiwi Liu has posted comments on this change by Kiwi Liu. ( https://review.coreboot.org/c/coreboot/+/84298?usp=email )
Change subject: soc/mediatek/common: Fix eMMC clock
......................................................................
Patch Set 8:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/84298/comment/f5f3f4fa_648c9832?usp... :
PS3, Line 9: Mediatek SOC start operating at eMMC clock around 2 MHz
: right after power-on.
: In JEDEC spec, this period is 400 kHz or less.
No, you don't
Done
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