Change in coreboot[master]: soc/amd/cezanne: Turn off gpp clock request for disabled devices

[Robert Zieba (Code Review)]

Attention is currently required from: Robert Zieba, Jason Glenesk, Raul Rangel, Marshall Dawson, Rob Barnes.
Hello build bot (Jenkins), Jason Glenesk, Raul Rangel, Marshall Dawson, Rob Barnes, Felix Held,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/61259

to look at the new patch set (#9).

Change subject: soc/amd/cezanne: Turn off gpp clock request for disabled devices
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soc/amd/cezanne: Turn off gpp clock request for disabled devices

The current behavior does not actually check if a device is present before enabling the corresponding gpp_clkx_clock_request_mapping bits which may cause issues with L1SS. This change sets the corresponding gpp_clkx_clock_request_mapping to off if the corresponding device is disabled.

BUG=b:202252869
TEST=Checked that value of GPP_CLK_CNTRL matched the expected value when devices are enabled/disabled
FIXED=b:202252869
Signed-off-by: Robert Zieba 
Change-Id: I77389372c60bdec572622a3b49484d4789fd4e4c
---
M src/mainboard/google/guybrush/Makefile.inc
M src/soc/amd/cezanne/chip.h
M src/soc/amd/cezanne/fch.c
3 files changed, 82 insertions(+), 12 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/59/61259/9