Change in coreboot[master]: soc/intel/alderlake: Add support for FSP CNVi pin muxing - coreboot-gerrit

2 Mar 2021


      Tim Wawrzynczak has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/51110 )
Change subject: soc/intel/alderlake: Add support for FSP CNVi pin muxing
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Abandoned
GpioOverride UPD negates need for this
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Idda2da4bddbe1be6c740cba4c44ae31b6a63c2fa
Gerrit-Change-Number: 51110
Gerrit-PatchSet: 1
Gerrit-Owner: Tim Wawrzynczak twawrzynczak@chromium.org
Gerrit-Reviewer: Boris Mittelberg bmbm@google.com
Gerrit-Reviewer: Furquan Shaikh furquan@google.com
Gerrit-Reviewer: Patrick Rudolph siro@das-labor.org
Gerrit-Reviewer: Paul Menzel paulepanter@users.sourceforge.net
Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org
Gerrit-MessageType: abandon