[S] Change in coreboot[master]: mb/google/zork: Rename pcie_gpio_table to romstage_gpio_table

[Matt DeVillier (Code Review)]

Attention is currently required from: Jason Nien, Martin Roth.

Matt DeVillier has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/69455 )

Change subject: mb/google/zork: Rename pcie_gpio_table to romstage_gpio_table
......................................................................

mb/google/zork: Rename pcie_gpio_table to romstage_gpio_table

Rename so table more indicative of when GPIOs are set, and so it can
be used for more than just setting PCIe GPIOs. Will be used to set
touchscreen GPIOs as part of power sequencing in a subsequent commit.

Rename getter functions to match.

This mirrors the changes made for skyrim in CB:67810

Change-Id: Ib1bfd9a12e0a8cb91fa928b7f93b87567314849d
Signed-off-by: Matt DeVillier 
---
M src/mainboard/google/zork/romstage.c
M src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c
M src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c
M src/mainboard/google/zork/variants/baseboard/include/baseboard/variants.h
4 files changed, 27 insertions(+), 9 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/55/69455/1

diff --git a/src/mainboard/google/zork/romstage.c b/src/mainboard/google/zork/romstage.c
index dc35a05..a9fcb4e 100644
--- a/src/mainboard/google/zork/romstage.c
+++ b/src/mainboard/google/zork/romstage.c
@@ -13,5 +13,5 @@

void mb_pre_fspm(void)
 {
-	baseboard_pcie_gpio_configure();
+	baseboard_romstage_gpio_configure();
 }
diff --git a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c
index 70e456c..f2c1a19 100644
--- a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c
+++ b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c
@@ -248,9 +248,9 @@
    gpio_set(GPIO_42, 1);
 }

-void baseboard_pcie_gpio_configure(void)
+void baseboard_romstage_gpio_configure(void)
 {
-	static const struct soc_amd_gpio pcie_gpio_table[] = {
+	static const struct soc_amd_gpio romstage_gpio_table[] = {
    	/* PCIE_RST1_L - Variable timings (May remove) */
    	PAD_NF(GPIO_27, PCIE_RST1_L, PULL_NONE),
    	/* NVME_AUX_RESET_L */
@@ -265,7 +265,7 @@
    	PAD_GPO(GPIO_142, HIGH),
    };

-	gpio_configure_pads(pcie_gpio_table, ARRAY_SIZE(pcie_gpio_table));
+	gpio_configure_pads(romstage_gpio_table, ARRAY_SIZE(romstage_gpio_table));

/* Deassert PCIE_RST1_L */
    gpio_set(GPIO_27, 1);
diff --git a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c
index 455684e..9864a93 100644
--- a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c
+++ b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c
@@ -258,9 +258,9 @@
    gpio_set(GPIO_42, 1);
 }

-void baseboard_pcie_gpio_configure(void)
+void baseboard_romstage_gpio_configure(void)
 {
-	static const struct soc_amd_gpio pcie_gpio_table[] = {
+	static const struct soc_amd_gpio romstage_gpio_table[] = {
    	/* NVME_AUX_RESET_L */
    	PAD_GPO(GPIO_40, HIGH),
    	/* CLK_REQ0_L - WIFI */
@@ -273,7 +273,7 @@
    	PAD_GPO(GPIO_142, HIGH),
    };

-	gpio_configure_pads(pcie_gpio_table, ARRAY_SIZE(pcie_gpio_table));
+	gpio_configure_pads(romstage_gpio_table, ARRAY_SIZE(romstage_gpio_table));

if (variant_uses_v3_schematics())
    	wifi_power_reset_configure_v3();
diff --git a/src/mainboard/google/zork/variants/baseboard/include/baseboard/variants.h b/src/mainboard/google/zork/variants/baseboard/include/baseboard/variants.h
index c76ca02..b44cd65 100644
--- a/src/mainboard/google/zork/variants/baseboard/include/baseboard/variants.h
+++ b/src/mainboard/google/zork/variants/baseboard/include/baseboard/variants.h
@@ -47,8 +47,8 @@
 void variant_bluetooth_update(void);
 /* Update touchscreen configuration in devicetree during ramstage. */
 void variant_touchscreen_update(void);
-/* Configure PCIe GPIOs as per baseboard sequencing requirements. */
-void baseboard_pcie_gpio_configure(void);
+/* Configure romstage GPIOs as per baseboard sequencing requirements. */
+void baseboard_romstage_gpio_configure(void);

/* Per variant FSP-S initialization, default implementation in baseboard and
  * overridable by the variant. */