Change in coreboot[master]: mb/google/guybrush: Set Gen3 default for all PCIe devices

[Matt Papageorge (Code Review)]

Matt Papageorge has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/58799 )

Change subject: mb/google/guybrush: Set Gen3 default for all PCIe devices
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mb/google/guybrush: Set Gen3 default for all PCIe devices

Currently link_speed_capability is not specified within
the DXIO descriptors sent to FSP. This value specifies
the maximum speed that a PCIe device should train up to.
It appears without specifying this value (left 0) DXIO
chooses Gen2 as a default. The only device on Monkey
Island that is capable of Gen3 is the NVME but this may
not always be the case.

BUG=b:204791296
TEST=Boot to OS and check link speed with LSPCI to verify
NVME link speed goes from 2.5 GT/s to 5 GT/s

Change-Id: Ibeac4b9e6a60567fb513e157d854399f5d12aee9
Signed-off-by: Matt Papageorge 
---
M src/mainboard/google/guybrush/port_descriptors.c
1 file changed, 4 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/99/58799/1

diff --git a/src/mainboard/google/guybrush/port_descriptors.c b/src/mainboard/google/guybrush/port_descriptors.c
index a98983b..af06e7f 100644
--- a/src/mainboard/google/guybrush/port_descriptors.c
+++ b/src/mainboard/google/guybrush/port_descriptors.c
@@ -14,6 +14,7 @@
    	.port_present = true,
    	.start_logical_lane = 0,
    	.end_logical_lane = 0,
+		.link_speed_capability = 3,
    	.device_number = PCI_SLOT(WLAN_DEVFN),
    	.function_number = PCI_FUNC(WLAN_DEVFN),
    	.link_aspm = ASPM_L1,
@@ -28,6 +29,7 @@
    	.port_present = true,
    	.start_logical_lane = 1,
    	.end_logical_lane = 1,
+		.link_speed_capability = 3,
    	.device_number = PCI_SLOT(SD_DEVFN),
    	.function_number = PCI_FUNC(SD_DEVFN),
    	.link_aspm = ASPM_L1,
@@ -43,6 +45,7 @@
    	.port_present = true,
    	.start_logical_lane = 2,
    	.end_logical_lane = 2,
+		.link_speed_capability = 3,
    	.device_number = PCI_SLOT(WWAN_DEVFN),
    	.function_number = PCI_FUNC(WWAN_DEVFN),
    	.link_aspm = ASPM_L1,
@@ -57,6 +60,7 @@
    	.port_present = true,
    	.start_logical_lane = 4,
    	.end_logical_lane = 7,
+		.link_speed_capability = 3,
    	.device_number = PCI_SLOT(NVME_DEVFN),
    	.function_number = PCI_FUNC(NVME_DEVFN),
    	.link_aspm = ASPM_L1,