[XS] Change in coreboot[main]: soc/intel/braswell/Kconfig: Correct CONFIG_DCACHE_RAM_SIZE

[Frans Hendriks (Code Review)]

Attention is currently required from: Arthur Heymans, Felix Held.

Hello Arthur Heymans, Felix Held,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/82256?usp=email

to look at the new patch set (#2).

Change subject: soc/intel/braswell/Kconfig: Correct CONFIG_DCACHE_RAM_SIZE
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soc/intel/braswell/Kconfig: Correct CONFIG_DCACHE_RAM_SIZE

In log warning ´Wrong CAR region used'is reported.
Configured size is 0x8000 where FSP-T is returning value 0x4000.

Set CONFIG_CACHE_RAM_SIZE to 0x4000

BUG = N/A
TEST = Built and boot facebook fbg1701 and verify log file

Change-Id: Ieb781d5f0645a75cce0dc7a3808b2af3e3ce245a
Signed-off-by: Frans Hendriks 
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M src/soc/intel/braswell/Kconfig
1 file changed, 1 insertion(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/56/82256/2