Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/52416 )
Change subject: mb/intel/shadowmountain: Enable early EC Software Sync ......................................................................
mb/intel/shadowmountain: Enable early EC Software Sync
BUG=None TEST=Build and boot to OS on shadowmountain. Ensure that the EC Software Sync is complete.
Signed-off-by: Usha P usha.p@intel.com Change-Id: I8648db685d9c63ed1f2b3e599ca951d6648b7baf Reviewed-on: https://review.coreboot.org/c/coreboot/+/52416 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Balaji Manigandan balaji.manigandan@intel.com Reviewed-by: Maulik V Vaghela maulik.v.vaghela@intel.com --- M src/mainboard/intel/shadowmountain/Kconfig 1 file changed, 1 insertion(+), 1 deletion(-)
Approvals: build bot (Jenkins): Verified Balaji Manigandan: Looks good to me, but someone else must approve Maulik V Vaghela: Looks good to me, approved
diff --git a/src/mainboard/intel/shadowmountain/Kconfig b/src/mainboard/intel/shadowmountain/Kconfig index e42160f..94a279f 100644 --- a/src/mainboard/intel/shadowmountain/Kconfig +++ b/src/mainboard/intel/shadowmountain/Kconfig @@ -31,12 +31,12 @@ select GBB_FLAG_FORCE_DEV_BOOT_USB select GBB_FLAG_FORCE_DEV_BOOT_ALTFW select GBB_FLAG_FORCE_MANUAL_RECOVERY - select GBB_FLAG_DISABLE_EC_SOFTWARE_SYNC
config VBOOT select EC_GOOGLE_CHROMEEC_SWITCHES select VBOOT_LID_SWITCH select HAS_RECOVERY_MRC_CACHE + select VBOOT_EARLY_EC_SYNC
config DIMM_SPD_SIZE int