[M] Change in coreboot[main]: soc/mediatek/common: Move common GPIO definitions to gpio_defs.h

[Yidi Lin (Code Review)]

Yidi Lin has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/84221?usp=email )

Change subject: soc/mediatek/common: Move common GPIO definitions to gpio_defs.h
......................................................................

soc/mediatek/common: Move common GPIO definitions to gpio_defs.h

BUG=none
TEST=emerge-{asurada, cherry, corsola, geralt, rauru} coreboot

Change-Id: If35dcc4d88732f92c7c43a5eed0478ec52cf1802
Signed-off-by: Yidi Lin 
---
A src/soc/mediatek/common/include/soc/gpio_defs.h
M src/soc/mediatek/mt8186/include/soc/gpio.h
M src/soc/mediatek/mt8188/include/soc/gpio.h
M src/soc/mediatek/mt8192/include/soc/gpio.h
M src/soc/mediatek/mt8195/include/soc/gpio.h
M src/soc/mediatek/mt8196/include/soc/gpio.h
6 files changed, 49 insertions(+), 179 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/21/84221/1

diff --git a/src/soc/mediatek/common/include/soc/gpio_defs.h b/src/soc/mediatek/common/include/soc/gpio_defs.h
new file mode 100644
index 0000000..3b0ddea
--- /dev/null
+++ b/src/soc/mediatek/common/include/soc/gpio_defs.h
@@ -0,0 +1,44 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#ifndef SOC_MEDIATEK_COMMON_GPIO_DEFS_H
+#define SOC_MEDIATEK_COMMON_GPIO_DEFS_H
+
+#include <types.h>
+
+enum {
+	MAX_GPIO_REG_BITS = 32,
+	MAX_GPIO_MODE_PER_REG = 8,
+	GPIO_MODE_BITS = 4,
+};
+
+#define GPIO(name) ((gpio_t){ \
+		.id = PAD_##name##_ID, \
+		.flag = PAD_##name##_FLAG, \
+		.bit = PAD_##name##_BIT, \
+		.base = PAD_##name##_BASE, \
+		.offset = PAD_##name##_OFFSET \
+	})
+
+#define PIN(id, name, flag, bit, base, offset, \
+	    func1, func2, func3, func4, func5, func6, func7) \
+	PAD_##name##_ID = id, \
+	PAD_##name##_FLAG = flag, \
+	PAD_##name##_BIT = bit, \
+	PAD_##name##_BASE = base, \
+	PAD_##name##_OFFSET = offset, \
+	PAD_##name##_FUNC_##func1 = 1, \
+	PAD_##name##_FUNC_##func2 = 2, \
+	PAD_##name##_FUNC_##func3 = 3, \
+	PAD_##name##_FUNC_##func4 = 4, \
+	PAD_##name##_FUNC_##func5 = 5, \
+	PAD_##name##_FUNC_##func6 = 6, \
+	PAD_##name##_FUNC_##func7 = 7
+
+struct val_regs {
+	uint32_t val;
+	uint32_t set;
+	uint32_t rst;
+	uint32_t align;
+};
+
+#endif
diff --git a/src/soc/mediatek/mt8186/include/soc/gpio.h b/src/soc/mediatek/mt8186/include/soc/gpio.h
index 4ce1e98..1c1f148 100644
--- a/src/soc/mediatek/mt8186/include/soc/gpio.h
+++ b/src/soc/mediatek/mt8186/include/soc/gpio.h
@@ -10,41 +10,13 @@

#include <soc/addressmap.h>
 #include <soc/gpio_common.h>
+#include <soc/gpio_defs.h>
 #include <types.h>

#define GPIO_NUM 185

-enum {
-	MAX_GPIO_REG_BITS = 32,
-	MAX_GPIO_MODE_PER_REG = 8,
-	GPIO_MODE_BITS = 4,
-};
-
 #define GPIO_ID(name) PAD_##name##_ID

-#define PIN(id, name, flag, bit, base, offset, \
-	    func1, func2, func3, func4, func5, func6, func7) \
-	PAD_##name##_ID = id, \
-	PAD_##name##_FLAG = flag, \
-	PAD_##name##_BIT = bit, \
-	PAD_##name##_BASE = base, \
-	PAD_##name##_OFFSET = offset, \
-	PAD_##name##_FUNC_##func1 = 1, \
-	PAD_##name##_FUNC_##func2 = 2, \
-	PAD_##name##_FUNC_##func3 = 3, \
-	PAD_##name##_FUNC_##func4 = 4, \
-	PAD_##name##_FUNC_##func5 = 5, \
-	PAD_##name##_FUNC_##func6 = 6, \
-	PAD_##name##_FUNC_##func7 = 7
-
-#define GPIO(name) ((gpio_t){ \
-		.id = PAD_##name##_ID, \
-		.flag = PAD_##name##_FLAG, \
-		.bit = PAD_##name##_BIT, \
-		.base = PAD_##name##_BASE, \
-		.offset = PAD_##name##_OFFSET \
-	})
-
 enum {
    PIN(0, EINT0, 0, 13, 0x16, 0x50,
        I2S0_MCK, SPI0_CLK_B, I2S2_MCK, CMFLASH0,
@@ -603,13 +575,6 @@
        RES5, RES6, RES7),
 };

-struct val_regs {
-	uint32_t val;
-	uint32_t set;
-	uint32_t rst;
-	uint32_t align;
-};
-
 struct gpio_regs {
    struct val_regs dir[7];
    uint8_t rsv00[144];
diff --git a/src/soc/mediatek/mt8188/include/soc/gpio.h b/src/soc/mediatek/mt8188/include/soc/gpio.h
index 916cf84..4e666f1 100644
--- a/src/soc/mediatek/mt8188/include/soc/gpio.h
+++ b/src/soc/mediatek/mt8188/include/soc/gpio.h
@@ -10,40 +10,12 @@

#include <soc/addressmap.h>
 #include <soc/gpio_common.h>
+#include <soc/gpio_defs.h>
 #include <types.h>

#define GPIO_NUM 177

enum {
-	MAX_GPIO_REG_BITS = 32,
-	MAX_GPIO_MODE_PER_REG = 8,
-	GPIO_MODE_BITS = 4,
-};
-
-#define PIN(id, name, flag, bit, base, offset, \
-		func1, func2, func3, func4, func5, func6, func7) \
-	PAD_##name##_ID = id, \
-	PAD_##name##_FLAG = flag, \
-	PAD_##name##_BIT = bit, \
-	PAD_##name##_BASE = base, \
-	PAD_##name##_OFFSET = offset, \
-	PAD_##name##_FUNC_##func1 = 1, \
-	PAD_##name##_FUNC_##func2 = 2, \
-	PAD_##name##_FUNC_##func3 = 3, \
-	PAD_##name##_FUNC_##func4 = 4, \
-	PAD_##name##_FUNC_##func5 = 5, \
-	PAD_##name##_FUNC_##func6 = 6, \
-	PAD_##name##_FUNC_##func7 = 7
-
-#define GPIO(name) ((gpio_t){ \
-		.id = PAD_##name##_ID, \
-		.flag = PAD_##name##_FLAG, \
-		.bit = PAD_##name##_BIT, \
-		.base = PAD_##name##_BASE, \
-		.offset = PAD_##name##_OFFSET \
-	})
-
-enum {
    PIN(0, GPIO00, 0, 6, 0x31, 0xe0,
        TP_GPIO0_AO, SPIM5_CSB, UTXD1, DMIC3_CLK,
        I2SIN_MCK, I2SO2_MCK, DBG_MON_A0),
@@ -577,12 +549,6 @@
        RES5, RES6, RES7),
 };

-struct val_regs {
-	uint32_t val;
-	uint32_t set;
-	uint32_t rst;
-	uint32_t align;
-};
 struct gpio_regs {
    struct val_regs dir[7];
    uint8_t rsv00[144];
diff --git a/src/soc/mediatek/mt8192/include/soc/gpio.h b/src/soc/mediatek/mt8192/include/soc/gpio.h
index 716a63d..4b95f87 100644
--- a/src/soc/mediatek/mt8192/include/soc/gpio.h
+++ b/src/soc/mediatek/mt8192/include/soc/gpio.h
@@ -5,38 +5,10 @@

#include <soc/addressmap.h>
 #include <soc/gpio_common.h>
+#include <soc/gpio_defs.h>
 #include <types.h>

enum {
-	MAX_GPIO_REG_BITS = 32,
-	MAX_GPIO_MODE_PER_REG = 8,
-	GPIO_MODE_BITS = 4,
-};
-
-#define PIN(id, name, flag, bit, base, offset, \
-	    func1, func2, func3, func4, func5, func6, func7) \
-	PAD_##name##_ID = id, \
-	PAD_##name##_FLAG = flag, \
-	PAD_##name##_BIT = bit, \
-	PAD_##name##_BASE = base, \
-	PAD_##name##_OFFSET = offset, \
-	PAD_##name##_FUNC_##func1 = 1, \
-	PAD_##name##_FUNC_##func2 = 2, \
-	PAD_##name##_FUNC_##func3 = 3, \
-	PAD_##name##_FUNC_##func4 = 4, \
-	PAD_##name##_FUNC_##func5 = 5, \
-	PAD_##name##_FUNC_##func6 = 6, \
-	PAD_##name##_FUNC_##func7 = 7
-
-#define GPIO(name) ((gpio_t){ \
-		.id = PAD_##name##_ID, \
-		.flag = PAD_##name##_FLAG, \
-		.bit = PAD_##name##_BIT, \
-		.base = PAD_##name##_BASE, \
-		.offset = PAD_##name##_OFFSET \
-	})
-
-enum {
    PIN(0, EINT0, 0, 9, 0x23, 0xb0,
    	SPI6_CLK, I2S5_MCK, PWM_0, TDM_LRCK,
    	TP_GPIO0_AO, MD_INT0, RES7),
@@ -699,13 +671,6 @@
    	I2S6_DI, I2S8_DI, RES6, RES7),
 };

-struct val_regs {
-	uint32_t val;
-	uint32_t set;
-	uint32_t rst;
-	uint32_t align;
-};
-
 struct gpio_regs {
    struct val_regs dir[7];
    uint8_t rsv00[144];
diff --git a/src/soc/mediatek/mt8195/include/soc/gpio.h b/src/soc/mediatek/mt8195/include/soc/gpio.h
index 02c3580..1da8b55 100644
--- a/src/soc/mediatek/mt8195/include/soc/gpio.h
+++ b/src/soc/mediatek/mt8195/include/soc/gpio.h
@@ -5,38 +5,10 @@

#include <soc/addressmap.h>
 #include <soc/gpio_common.h>
+#include <soc/gpio_defs.h>
 #include <types.h>

enum {
-	MAX_GPIO_REG_BITS = 32,
-	MAX_GPIO_MODE_PER_REG = 8,
-	GPIO_MODE_BITS = 4,
-};
-
-#define PIN(id, name, flag, bit, base, offset, \
-	    func1, func2, func3, func4, func5, func6, func7) \
-	PAD_##name##_ID = id, \
-	PAD_##name##_FLAG = flag, \
-	PAD_##name##_BIT = bit, \
-	PAD_##name##_BASE = base, \
-	PAD_##name##_OFFSET = offset, \
-	PAD_##name##_FUNC_##func1 = 1, \
-	PAD_##name##_FUNC_##func2 = 2, \
-	PAD_##name##_FUNC_##func3 = 3, \
-	PAD_##name##_FUNC_##func4 = 4, \
-	PAD_##name##_FUNC_##func5 = 5, \
-	PAD_##name##_FUNC_##func6 = 6, \
-	PAD_##name##_FUNC_##func7 = 7
-
-#define GPIO(name) ((gpio_t){ \
-		.id = PAD_##name##_ID, \
-		.flag = PAD_##name##_FLAG, \
-		.bit = PAD_##name##_BIT, \
-		.base = PAD_##name##_BASE, \
-		.offset = PAD_##name##_OFFSET \
-	})
-
-enum {
    PIN(0, GPIO_00, 1, 0, 0x23, 0x60,
        TP_GPIO0_AO, MSDC2_CMD, TDMIN_MCK, CLKM0,
        PERSTN_1, IDDIG_1P, DMIC4_CLK),
@@ -470,13 +442,6 @@
        RES5, RES6, DBG_MON_A13),
 };

-struct val_regs {
-	uint32_t val;
-	uint32_t set;
-	uint32_t rst;
-	uint32_t align;
-};
-
 struct gpio_regs {
    struct val_regs dir[7];
    uint8_t rsv00[144];
diff --git a/src/soc/mediatek/mt8196/include/soc/gpio.h b/src/soc/mediatek/mt8196/include/soc/gpio.h
index a60cba6..0981a0b 100644
--- a/src/soc/mediatek/mt8196/include/soc/gpio.h
+++ b/src/soc/mediatek/mt8196/include/soc/gpio.h
@@ -10,23 +10,11 @@

#include <soc/addressmap.h>
 #include <soc/gpio_common.h>
+#include <soc/gpio_defs.h>
 #include <types.h>

#define GPIO_NUM 271

-enum {
-	MAX_GPIO_REG_BITS = 32,
-	MAX_GPIO_MODE_PER_REG = 8,
-	GPIO_MODE_BITS = 4,
-};
-
-struct val_regs {
-	uint32_t val;
-	uint32_t set;
-	uint32_t rst;
-	uint32_t align;
-};
-
 struct gpio_regs {
    struct val_regs dir[16];
    struct val_regs dout[16];
@@ -35,29 +23,6 @@
    uint32_t dram_pinmux_trapping;
 };

-#define PIN(id, name, flag, bit, base, offset, \
-		func1, func2, func3, func4, func5, func6, func7) \
-	PAD_##name##_ID = id, \
-	PAD_##name##_FLAG = flag, \
-	PAD_##name##_BIT = bit, \
-	PAD_##name##_BASE = base, \
-	PAD_##name##_OFFSET = offset, \
-	PAD_##name##_FUNC_##func1 = 1, \
-	PAD_##name##_FUNC_##func2 = 2, \
-	PAD_##name##_FUNC_##func3 = 3, \
-	PAD_##name##_FUNC_##func4 = 4, \
-	PAD_##name##_FUNC_##func5 = 5, \
-	PAD_##name##_FUNC_##func6 = 6, \
-	PAD_##name##_FUNC_##func7 = 7
-
-#define GPIO(name) ((gpio_t){ \
-		.id = PAD_##name##_ID, \
-		.flag = PAD_##name##_FLAG, \
-		.bit = PAD_##name##_BIT, \
-		.base = PAD_##name##_BASE, \
-		.offset = PAD_##name##_OFFSET \
-	})
-
 enum {
    PIN(0, EINT0, 0, 0, 0x18, 0xa0,
    	DMIC1_CLK, RES2, SPI3_A_MO, FMI2S_B_LRCK,