[M] Change in coreboot[master]: mb/google/dedede/var/dibbi: Update power limits

[ChiaLing (Code Review)]

ChiaLing has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/75681?usp=email )

Change subject: mb/google/dedede/var/dibbi: Update power limits
......................................................................

mb/google/dedede/var/dibbi: Update power limits

Update Dibbi power limit in ramstage

BUG=b:281479111
TEST=emerge-dedede coreboot and check psys and PLx
on DUT

Signed-off-by: Chia-Ling Hou 
Change-Id: Ieaff856b762b546f3e99acb7ba2ce15791193da6
---
M src/mainboard/google/dedede/variants/dibbi/Makefile.inc
A src/mainboard/google/dedede/variants/dibbi/ramstage.c
2 files changed, 73 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/81/75681/1

diff --git a/src/mainboard/google/dedede/variants/dibbi/Makefile.inc b/src/mainboard/google/dedede/variants/dibbi/Makefile.inc
index eb2c9bc..66f0263 100644
--- a/src/mainboard/google/dedede/variants/dibbi/Makefile.inc
+++ b/src/mainboard/google/dedede/variants/dibbi/Makefile.inc
@@ -1,3 +1,4 @@
 ## SPDX-License-Identifier: GPL-2.0-or-later

ramstage-y += gpio.c
+ramstage-y += ramstage.c
diff --git a/src/mainboard/google/dedede/variants/dibbi/ramstage.c b/src/mainboard/google/dedede/variants/dibbi/ramstage.c
new file mode 100644
index 0000000..6953076
--- /dev/null
+++ b/src/mainboard/google/dedede/variants/dibbi/ramstage.c
@@ -0,0 +1,72 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+#include <baseboard/variants.h>
+#include <chip.h>
+#include <console/console.h>
+#include <device/device.h>
+#include <device/pci_ids.h>
+#include <device/pci_ops.h>
+#include <drivers/intel/dptf/chip.h>
+#include <ec/google/chromeec/ec.h>
+#include <intelblocks/power_limit.h>
+
+const struct cpu_power_limits pwr_limits[] = {
+	/* SKU_ID, TDP (Watts), pl1_min, pl1_max, pl2_min, pl2_max, pl4 */
+    // N4500
+	{ PCI_DEVICE_ID_INTEL_JSL_ID_1, 6, 6000, 6000,  20000,  20000, 60000 },
+	// N6000
+	{ PCI_DEVICE_ID_INTEL_JSL_ID_2, 6, 6000, 6000,  20000,  20000, 60000 },
+	// N5100
+	{ PCI_DEVICE_ID_INTEL_JSL_ID_3, 6, 6000, 6000,  20000,  20000, 60000 },
+	// N4505
+	{ PCI_DEVICE_ID_INTEL_JSL_ID_4, 10, 10000, 10000, 25000, 25000, 75000 },
+	// N5105
+	{ PCI_DEVICE_ID_INTEL_JSL_ID_5, 10, 10000, 10000, 25000, 25000, 75000 },
+};
+
+const struct system_power_limits sys_limits[] = {
+	/* SKU_ID, TDP (Watts), psys_pl1 (Watts), psys_pl2 (Watts) */
+	{ PCI_DEVICE_ID_INTEL_JSL_ID_1, 6, 31, 65 },
+	{ PCI_DEVICE_ID_INTEL_JSL_ID_2, 6, 31, 65 },
+	{ PCI_DEVICE_ID_INTEL_JSL_ID_3, 6, 31, 65 },
+	{ PCI_DEVICE_ID_INTEL_JSL_ID_4, 10, 35, 65 },
+	{ PCI_DEVICE_ID_INTEL_JSL_ID_5, 10, 35, 65 },
+};
+
+/*
+ * Psys_pmax considerations.
+ *
+ * Given the hardware design in dibbi, the serial shunt resistor is 0.01ohm.
+ * The full scale of hardware PSYS signal 1.6v maps to system current 6.009A
+ * instead of real system power. The equation is shown below:
+ * PSYS = 1.6v ~= (0.01ohm x 6.009A) x 50 (INA213, gain 50V/V) x R631/(R631 + R638)
+ * R631/(R631 + R638) = 0.5325 = 36K / (36K + 31.6K)
+ *
+ * The Psys_pmax is a SW setting which tells IMVP9.1 the mapping b/w system input
+ * current and the actual system power. Since there is no voltage information
+ * from PSYS, different voltage input would map to different Psys_pmax settings:
+ * For Type-C 15V, the Psys_pmax should be 15v x 6.009A = 90.135W
+ * For Type-C 20V, the Psys_pmax should be 20v x 6.009A = 120.18W
+ * For a barrel jack, the Psys_pmax should be 19v x 6.009A = 114.171W
+ *
+ * Imagine that there is a type-c 100W (20V/5A) connected to DUT w/ full loading,
+ * and the Psys_pmax setting is 120W. Then IMVP9.1 can calculate the current system
+ * power = 120W * 5A / 6.009A = 100W, which is the actual system power.
+ */
+const struct psys_config psys_config = {
+	.efficiency = 97,
+	.psys_imax_ma = 6009,
+	.bj_volts_mv = 19000
+};
+
+static void update_power_limits(void)
+{
+	size_t total_entries = ARRAY_SIZE(pwr_limits);
+	variant_update_psys_power_limits(pwr_limits, sys_limits, total_entries, &psys_config);
+	variant_update_power_limits(pwr_limits, total_entries);
+}
+
+void variant_devtree_update(void)
+{
+	update_power_limits();
+}
\ No newline at end of file