Change in coreboot[master]: soc/amd/cezanne: Turn off gpp clock request for disabled devices

[Felix Held (Code Review)]

Attention is currently required from: Robert Zieba, Raul Rangel, Rob Barnes, Karthik Ramasubramanian.
Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61259 )

Change subject: soc/amd/cezanne: Turn off gpp clock request for disabled devices
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Patch Set 13:

(3 comments)

File src/soc/amd/cezanne/fch.c:

PS13: 
without having looked into the details: can the newly added code in gpp_clk_setup be factored out into a separate function?

https://review.coreboot.org/c/coreboot/+/61259/comment/eda34e4f_8173e6b6 
PS13, Line 11: #include "chip.h"
i think coreboot usually puts the "" includes after the <> includes. reordering includes should be done in a separate patch

File src/soc/amd/cezanne/platform_descriptors.c:

PS13: 
i'd add the port descriptors of all boards to their ramstage instead of introducing a weak function here. the solution with the weak function would also result in having different dxio descriptor data in romstage and ramstage which makes things much more difficult to debug