[S] Change in coreboot[main]: cpu/intel/model_206ax: Allow turbo boost ratio limit configuration

[Anastasios Koutian (Code Review)]

Attention is currently required from: Angel Pons, Nico Huber.

Anastasios Koutian has posted comments on this change by Anastasios Koutian. ( https://review.coreboot.org/c/coreboot/+/83271?usp=email )

Change subject: cpu/intel/model_206ax: Allow turbo boost ratio limit configuration
......................................................................

Patch Set 6:

(4 comments)

File src/cpu/intel/model_206ax/chip.h:

https://review.coreboot.org/c/coreboot/+/83271/comment/a46fe5d5_2c2f43b1?usp... :
PS5, Line 63: acrive
> typo: ac**t**ive

Done

File src/cpu/intel/model_206ax/model_206ax.h:

https://review.coreboot.org/c/coreboot/+/83271/comment/64991629_b318722a?usp... :
PS5, Line 49:
> The tabs are spurious at this point, please remove. […]

Done

File src/cpu/intel/model_206ax/model_206ax_init.c:

https://review.coreboot.org/c/coreboot/+/83271/comment/9ee319f2_0d6cd461?usp... :
PS5, Line 180: 	msr_t msr = rdmsr(MSR_TURBO_RATIO_LIMIT);
             : 
             : 		if (conf->turbo_ratio_limit_1c) {
             : 			msr.lo &= ~0xff;
             : 			msr.lo |= (conf->turbo_ratio_limit_1c);
             : 		}
             : 
             : 		if (conf->turbo_ratio_limit_2c) {
             : 			msr.lo &= ~(0xff << 8);
             : 			msr.lo |= (conf->turbo_ratio_limit_2c << 8);
             : 		}
             : 
             : 		if (conf->turbo_ratio_limit_3c) {
             : 			msr.lo &= ~(0xff << 16);
             : 			msr.lo |= (conf->turbo_ratio_limit_3c << 16);
             : 		}
             : 
             : 		if (conf->turbo_ratio_limit_4c) {
             : 			msr.lo &= ~(0xff << 24);
             : 			msr.lo |= (conf->turbo_ratio_limit_4c << 24);
             : 		}
             : 
             : 		wrmsr(MSR_TURBO_RATIO_LIMIT, msr);
> nit: drop one tab […]

Done

https://review.coreboot.org/c/coreboot/+/83271/comment/c210fdd4_10a42574?usp... :
PS5, Line 333: BIOS_NOTICE
> It's expected to be like this on most processors, isn't it? Then it should […]

Done