Change in coreboot[master]: util/inteltool: Support dumping more BARs on Skylake mobile SoCs

[Patrick Georgi (Code Review)]

Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/42749 )

Change subject: util/inteltool: Support dumping more BARs on Skylake mobile SoCs
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util/inteltool: Support dumping more BARs on Skylake mobile SoCs

Support dumping MCHBAR, EPBAR, DMIBAR and PCIEXBAR on SKL-U/Y.
These chipsets are similar to others supported by the tool.

Working on SKL-U.

Change-Id: Ic43d54ef189d500701872a56e67781a744990328
Signed-off-by: Benjamin Doron 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42749
Tested-by: build bot (Jenkins) 
Reviewed-by: Michael Niewöhner
Reviewed-by: Angel Pons 
---
M util/inteltool/memory.c
M util/inteltool/pcie.c
2 files changed, 9 insertions(+), 1 deletion(-)

Approvals:
  build bot (Jenkins): Verified
  Angel Pons: Looks good to me, approved
  Michael Niewöhner: Looks good to me, approved

diff --git a/util/inteltool/memory.c b/util/inteltool/memory.c
index 1bd127b..728d4d6 100644
--- a/util/inteltool/memory.c
+++ b/util/inteltool/memory.c
@@ -207,10 +207,12 @@
    case PCI_DEVICE_ID_INTEL_CORE_4TH_GEN_U:
    case PCI_DEVICE_ID_INTEL_CORE_5TH_GEN_U:
    case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_D2:
+	case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_U:
+	case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_Y:
+	case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_M:
    case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_WST:
    case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_D:
    case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_E:
-	case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_M:
    case PCI_DEVICE_ID_INTEL_CORE_7TH_GEN_U:
    case PCI_DEVICE_ID_INTEL_CORE_7TH_GEN_Y:
    case PCI_DEVICE_ID_INTEL_CORE_7TH_GEN_U_Q:
diff --git a/util/inteltool/pcie.c b/util/inteltool/pcie.c
index e5828cc..d392c28 100644
--- a/util/inteltool/pcie.c
+++ b/util/inteltool/pcie.c
@@ -251,6 +251,8 @@
    case PCI_DEVICE_ID_INTEL_CORE_4TH_GEN_U:
    case PCI_DEVICE_ID_INTEL_CORE_5TH_GEN_U:
    case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_D2:
+	case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_U:
+	case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_Y:
    case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_M:
    case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_WST:
    case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_D:
@@ -380,6 +382,8 @@
    	dmibar_phys &= 0x0000007ffffff000UL; /* 38:12 */
    	break;
    case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_D2:
+	case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_U:
+	case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_Y:
    case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_M:
    case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_WST:
    case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_D:
@@ -493,6 +497,8 @@
    case PCI_DEVICE_ID_INTEL_CORE_4TH_GEN_U:
    case PCI_DEVICE_ID_INTEL_CORE_5TH_GEN_U:
    case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_D2:
+	case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_U:
+	case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_Y:
    case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_M:
    case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_WST:
    case PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_D: