Patch set updated for coreboot: ea945f2 boards: remove VBOOT_(REFCODE|RAMSTAGE|ROMSTAGE)_INDEX
Patrick Georgi (pgeorgi@google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/9959
-gerrit
commit ea945f249d6617864938dfa5c5451c27e35d24b3 Author: Aaron Durbin adurbin@chromium.org Date: Wed Apr 22 10:48:01 2015 -0500
boards: remove VBOOT_(REFCODE|RAMSTAGE|ROMSTAGE)_INDEX
These options will need to just be selected in within the .config files. There's not need in duplicating all these options.
Change-Id: I7b670bc59a3b35e39eee4faecaf4aa779d47a3bb Signed-off-by: Aaron Durbin adurbin@chromium.org --- src/mainboard/google/bolt/Kconfig | 4 ---- src/mainboard/google/cosmos/Kconfig | 4 ---- src/mainboard/google/falco/Kconfig | 4 ---- src/mainboard/google/nyan/Kconfig | 4 ---- src/mainboard/google/nyan_big/Kconfig | 4 ---- src/mainboard/google/nyan_blaze/Kconfig | 4 ---- src/mainboard/google/panther/Kconfig | 4 ---- src/mainboard/google/peppy/Kconfig | 4 ---- src/mainboard/google/rambi/Kconfig | 8 -------- src/mainboard/google/rush/Kconfig | 7 ------- src/mainboard/google/rush_ryu/Kconfig | 7 ------- src/mainboard/google/samus/Kconfig | 8 -------- src/mainboard/google/slippy/Kconfig | 4 ---- src/mainboard/google/veyron_brain/Kconfig | 11 ----------- src/mainboard/google/veyron_danger/Kconfig | 11 ----------- src/mainboard/google/veyron_jerry/Kconfig | 4 ---- src/mainboard/google/veyron_mighty/Kconfig | 4 ---- src/mainboard/google/veyron_pinky/Kconfig | 4 ---- src/mainboard/google/veyron_rialto/Kconfig | 11 ----------- src/mainboard/google/veyron_speedy/Kconfig | 4 ---- src/mainboard/intel/wtm2/Kconfig | 8 -------- 21 files changed, 123 deletions(-)
diff --git a/src/mainboard/google/bolt/Kconfig b/src/mainboard/google/bolt/Kconfig index d575d26..c901b8f 100644 --- a/src/mainboard/google/bolt/Kconfig +++ b/src/mainboard/google/bolt/Kconfig @@ -21,10 +21,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy select INTEL_INT15 select CHROMEOS_VBNV_CMOS
-config VBOOT_RAMSTAGE_INDEX - hex - default 0x2 - config MAINBOARD_DIR string default google/bolt diff --git a/src/mainboard/google/cosmos/Kconfig b/src/mainboard/google/cosmos/Kconfig index 8cd9983..99d8a64 100644 --- a/src/mainboard/google/cosmos/Kconfig +++ b/src/mainboard/google/cosmos/Kconfig @@ -44,10 +44,6 @@ config MAINBOARD_VENDOR string default "Google"
-config VBOOT_RAMSTAGE_INDEX - hex - default 0x3 - config BOOT_MEDIA_SPI_BUS int default 2 diff --git a/src/mainboard/google/falco/Kconfig b/src/mainboard/google/falco/Kconfig index 683712e..c836110 100644 --- a/src/mainboard/google/falco/Kconfig +++ b/src/mainboard/google/falco/Kconfig @@ -24,10 +24,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy select INTEL_INT15 select CHROMEOS_VBNV_CMOS
-config VBOOT_RAMSTAGE_INDEX - hex - default 0x2 - config MAINBOARD_DIR string default google/falco diff --git a/src/mainboard/google/nyan/Kconfig b/src/mainboard/google/nyan/Kconfig index 58edf61..a91eddd 100644 --- a/src/mainboard/google/nyan/Kconfig +++ b/src/mainboard/google/nyan/Kconfig @@ -81,10 +81,6 @@ config EC_GOOGLE_CHROMEEC_SPI_BUS hex default 1
-config VBOOT_RAMSTAGE_INDEX - hex - default 0x2 - config FLASHMAP_OFFSET hex default 0x00100000 diff --git a/src/mainboard/google/nyan_big/Kconfig b/src/mainboard/google/nyan_big/Kconfig index 555b5d1..9aac110 100644 --- a/src/mainboard/google/nyan_big/Kconfig +++ b/src/mainboard/google/nyan_big/Kconfig @@ -82,10 +82,6 @@ config EC_GOOGLE_CHROMEEC_SPI_BUS hex default 1
-config VBOOT_RAMSTAGE_INDEX - hex - default 0x2 - config FLASHMAP_OFFSET hex default 0x00100000 diff --git a/src/mainboard/google/nyan_blaze/Kconfig b/src/mainboard/google/nyan_blaze/Kconfig index 3b7c555..d7d92d6 100644 --- a/src/mainboard/google/nyan_blaze/Kconfig +++ b/src/mainboard/google/nyan_blaze/Kconfig @@ -83,10 +83,6 @@ config EC_GOOGLE_CHROMEEC_SPI_BUS hex default 1
-config VBOOT_RAMSTAGE_INDEX - hex - default 0x3 - config FLASHMAP_OFFSET hex default 0x00100000 diff --git a/src/mainboard/google/panther/Kconfig b/src/mainboard/google/panther/Kconfig index 76c1a12..6fdb46c 100644 --- a/src/mainboard/google/panther/Kconfig +++ b/src/mainboard/google/panther/Kconfig @@ -21,10 +21,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy select PHYSICAL_REC_SWITCH select CHROMEOS_VBNV_CMOS
-config VBOOT_RAMSTAGE_INDEX - hex - default 0x1 - config MAINBOARD_DIR string default google/panther diff --git a/src/mainboard/google/peppy/Kconfig b/src/mainboard/google/peppy/Kconfig index ea7c334..05234d0 100644 --- a/src/mainboard/google/peppy/Kconfig +++ b/src/mainboard/google/peppy/Kconfig @@ -26,10 +26,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy select INTEL_INT15 select CHROMEOS_VBNV_CMOS
-config VBOOT_RAMSTAGE_INDEX - hex - default 0x2 - config MAINBOARD_DIR string default google/peppy diff --git a/src/mainboard/google/rambi/Kconfig b/src/mainboard/google/rambi/Kconfig index 1461539..4c9e891 100644 --- a/src/mainboard/google/rambi/Kconfig +++ b/src/mainboard/google/rambi/Kconfig @@ -15,14 +15,6 @@ config BOARD_SPECIFIC_OPTIONS select ALWAYS_LOAD_OPROM select CHROMEOS_VBNV_CMOS
-config VBOOT_RAMSTAGE_INDEX - hex - default 0x2 - -config VBOOT_REFCODE_INDEX - hex - default 0x3 - config MAINBOARD_DIR string default google/rambi diff --git a/src/mainboard/google/rush/Kconfig b/src/mainboard/google/rush/Kconfig index cb6da1c..9cb0223 100644 --- a/src/mainboard/google/rush/Kconfig +++ b/src/mainboard/google/rush/Kconfig @@ -82,13 +82,6 @@ config BOOT_MEDIA_SPI_CHIP_SELECT help Which chip select to use for boot media.
-# For rush, we are using vboot2. Thus, index for stages: -# VBOOT_ROMSTAGE_INDEX -> Use default value of 0x2 -# VBOOT_RAMSTAGE_INDEX -> Use 0x3 -config VBOOT_RAMSTAGE_INDEX - hex - default 0x3 - config DRIVER_TPM_I2C_BUS hex default 0x2 diff --git a/src/mainboard/google/rush_ryu/Kconfig b/src/mainboard/google/rush_ryu/Kconfig index 2961cbe..2a7e0fb 100644 --- a/src/mainboard/google/rush_ryu/Kconfig +++ b/src/mainboard/google/rush_ryu/Kconfig @@ -79,13 +79,6 @@ config BOOT_MEDIA_SPI_CHIP_SELECT help Which chip select to use for boot media.
-# For ryu, we are using vboot2. Thus, index for stages: -# VBOOT_ROMSTAGE_INDEX -> Use default value of 0x2 -# VBOOT_RAMSTAGE_INDEX -> Use 0x3 -config VBOOT_RAMSTAGE_INDEX - hex - default 0x3 - config DRIVER_TPM_I2C_BUS hex default 0x2 diff --git a/src/mainboard/google/samus/Kconfig b/src/mainboard/google/samus/Kconfig index ee28b3c..664faf1 100644 --- a/src/mainboard/google/samus/Kconfig +++ b/src/mainboard/google/samus/Kconfig @@ -21,14 +21,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy select INTEL_INT15 select CHROMEOS_VBNV_CMOS
-config VBOOT_RAMSTAGE_INDEX - hex - default 0x3 - -config VBOOT_REFCODE_INDEX - hex - default 0x4 - config MAINBOARD_DIR string default google/samus diff --git a/src/mainboard/google/slippy/Kconfig b/src/mainboard/google/slippy/Kconfig index 0b1976a..48e5825 100644 --- a/src/mainboard/google/slippy/Kconfig +++ b/src/mainboard/google/slippy/Kconfig @@ -23,10 +23,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy select INTEL_INT15 select CHROMEOS_VBNV_CMOS
-config VBOOT_RAMSTAGE_INDEX - hex - default 0x2 - config MAINBOARD_DIR string default google/slippy diff --git a/src/mainboard/google/veyron_brain/Kconfig b/src/mainboard/google/veyron_brain/Kconfig index bea618c..c5ff0bb 100644 --- a/src/mainboard/google/veyron_brain/Kconfig +++ b/src/mainboard/google/veyron_brain/Kconfig @@ -49,17 +49,6 @@ config MAINBOARD_VENDOR string default "Google"
-# The 'ecrwhash' is removed from FMAP on Brain, since we don't have EC. -# As a result, we have to hack RAMSTAGE and ROMSTAGE index until there are -# better approaches for vboot2 to find right index. -config VBOOT_RAMSTAGE_INDEX - hex - default 0x2 - -config VBOOT_ROMSTAGE_INDEX - hex - default 0x1 - config BOOT_MEDIA_SPI_BUS int default 2 diff --git a/src/mainboard/google/veyron_danger/Kconfig b/src/mainboard/google/veyron_danger/Kconfig index f6e0060..d65a6c0 100644 --- a/src/mainboard/google/veyron_danger/Kconfig +++ b/src/mainboard/google/veyron_danger/Kconfig @@ -49,17 +49,6 @@ config MAINBOARD_VENDOR string default "Google"
-# The 'ecrwhash' is removed from FMAP on Danger, since we don't have EC. -# As a result, we have to hack RAMSTAGE and ROMSTAGE index until there are -# better approaches for vboot2 to find right index. -config VBOOT_RAMSTAGE_INDEX - hex - default 0x2 - -config VBOOT_ROMSTAGE_INDEX - hex - default 0x1 - config BOOT_MEDIA_SPI_BUS int default 2 diff --git a/src/mainboard/google/veyron_jerry/Kconfig b/src/mainboard/google/veyron_jerry/Kconfig index be0b736..f025829 100644 --- a/src/mainboard/google/veyron_jerry/Kconfig +++ b/src/mainboard/google/veyron_jerry/Kconfig @@ -60,10 +60,6 @@ config EC_GOOGLE_CHROMEEC_SPI_WAKEUP_DELAY_US int default 100
-config VBOOT_RAMSTAGE_INDEX - hex - default 0x3 - config BOOT_MEDIA_SPI_BUS int default 2 diff --git a/src/mainboard/google/veyron_mighty/Kconfig b/src/mainboard/google/veyron_mighty/Kconfig index 58972ad..4cccbb5 100644 --- a/src/mainboard/google/veyron_mighty/Kconfig +++ b/src/mainboard/google/veyron_mighty/Kconfig @@ -60,10 +60,6 @@ config EC_GOOGLE_CHROMEEC_SPI_WAKEUP_DELAY_US int default 100
-config VBOOT_RAMSTAGE_INDEX - hex - default 0x3 - config BOOT_MEDIA_SPI_BUS int default 2 diff --git a/src/mainboard/google/veyron_pinky/Kconfig b/src/mainboard/google/veyron_pinky/Kconfig index 87d24f0..c30039c 100644 --- a/src/mainboard/google/veyron_pinky/Kconfig +++ b/src/mainboard/google/veyron_pinky/Kconfig @@ -60,10 +60,6 @@ config EC_GOOGLE_CHROMEEC_SPI_WAKEUP_DELAY_US int default 100
-config VBOOT_RAMSTAGE_INDEX - hex - default 0x3 - config BOOT_MEDIA_SPI_BUS int default 2 diff --git a/src/mainboard/google/veyron_rialto/Kconfig b/src/mainboard/google/veyron_rialto/Kconfig index 597dd19..dc7d045 100644 --- a/src/mainboard/google/veyron_rialto/Kconfig +++ b/src/mainboard/google/veyron_rialto/Kconfig @@ -48,17 +48,6 @@ config MAINBOARD_VENDOR string default "Google"
-# The 'ecrwhash' is removed from FMAP on Rialto, since we don't have EC. -# As a result, we have to hack RAMSTAGE and ROMSTAGE index until there are -# better approaches for vboot2 to find right index. -config VBOOT_RAMSTAGE_INDEX - hex - default 0x2 - -config VBOOT_ROMSTAGE_INDEX - hex - default 0x1 - config BOOT_MEDIA_SPI_BUS int default 2 diff --git a/src/mainboard/google/veyron_speedy/Kconfig b/src/mainboard/google/veyron_speedy/Kconfig index 6a51457..1729b64 100644 --- a/src/mainboard/google/veyron_speedy/Kconfig +++ b/src/mainboard/google/veyron_speedy/Kconfig @@ -60,10 +60,6 @@ config EC_GOOGLE_CHROMEEC_SPI_WAKEUP_DELAY_US int default 100
-config VBOOT_RAMSTAGE_INDEX - hex - default 0x3 - config BOOT_MEDIA_SPI_BUS int default 2 diff --git a/src/mainboard/intel/wtm2/Kconfig b/src/mainboard/intel/wtm2/Kconfig index f23a803..98b2790 100644 --- a/src/mainboard/intel/wtm2/Kconfig +++ b/src/mainboard/intel/wtm2/Kconfig @@ -16,14 +16,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy select CHROMEOS_RAMOOPS_DYNAMIC select CHROMEOS_VBNV_CMOS
-config VBOOT_RAMSTAGE_INDEX - hex - default 0x1 - -config VBOOT_REFCODE_INDEX - hex - default 0x2 - config MAINBOARD_DIR string default intel/wtm2
-
Patrick Georgi