Change in blobs[master]: mb/google/guybrush: Update APCB file

[Karthik Ramasubramanian (Code Review)]

Karthik Ramasubramanian has submitted this change. ( https://review.coreboot.org/c/blobs/+/62963 )

Change subject: mb/google/guybrush: Update APCB file
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mb/google/guybrush: Update APCB file

The existing APCB file only has 4 SPD slots. This will not be enough
for DeWatt devices due to upcoming changes in how RAM IDs are allocated
for that variant. This commit updates the APCB file to have 16 slots
which is sufficient for DeWatt.

BUG=b:224884904
TEST=Used apcb_v3_edit to verify that the APCB file has 16 slots,
checked that AP firmware images built with this file boot correctly

Signed-off-by: Robert Zieba 
Change-Id: Ifbfe2c61c42cd503a70fd84c51ce184c40fed318
---
M mainboard/google/guybrush/APCB_CZN_D4.bin
M mainboard/google/guybrush/Release.txt
2 files changed, 11 insertions(+), 0 deletions(-)

Approvals:
  Karthik Ramasubramanian: Looks good to me, approved
  Martin L Roth: Verified; Looks good to me, approved

diff --git a/mainboard/google/guybrush/APCB_CZN_D4.bin b/mainboard/google/guybrush/APCB_CZN_D4.bin
index ff99c5d..7fe382e 100644
--- a/mainboard/google/guybrush/APCB_CZN_D4.bin
+++ b/mainboard/google/guybrush/APCB_CZN_D4.bin
Binary files differ
diff --git a/mainboard/google/guybrush/Release.txt b/mainboard/google/guybrush/Release.txt
index df803b8..7b4aa6b 100644
--- a/mainboard/google/guybrush/Release.txt
+++ b/mainboard/google/guybrush/Release.txt
@@ -4,6 +4,17 @@
 Files:
         APCB_CZN_D4.bin - Data only - No license, ABI or Version #

[phone]:
+- Increase the number of SPD slots in APCB_CZN_D4.bin from 4 to 16
+    Slots 0 - 3:
+    lp4x-spd-4.hex  # ID = 0(0b0000)  Parts = MT53E1G32D2NP-046 WT:A
+    lp4x-spd-1.hex  # ID = 1(0b0001)  Parts = MT53E512M32D2NP-046 WT:F
+    lp4x-spd-9.hex  # ID = 2(0b0010)  Parts = NT6AP256T32AV-J1
+    lp4x-spd-3.hex  # ID = 3(0b0011)  Parts = MT53E1G32D2NP-046 WT:B
+
+    Slots 4 - 15:
+    Place holder SPDs from Majolica
+
 2021-04-05:
 - Fix UMAmode
 - Enable VBL/PSP to control eDP VDD.