Change in coreboot[master]: soc/intel/alderlake: Use intel_microcode_find() to locate ucode.bin

[Subrata Banik (Code Review)]

Subrata Banik has submitted this change. ( https://review.coreboot.org/c/coreboot/+/57831 )

Change subject: soc/intel/alderlake: Use intel_microcode_find() to locate ucode.bin
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soc/intel/alderlake: Use intel_microcode_find() to locate ucode.bin

`intel_microcode_find()` function uses cached ucode data hence it would
avoid locating ucode.bin from CBFS while passing ucode.bin pointer to
FSP.

Change-Id: I8f92c9f20dfb055c19c6996e601c8c24767aecb7
Signed-off-by: Subrata Banik 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57831
Tested-by: build bot (Jenkins) 
Reviewed-by: Tim Wawrzynczak 
---
M src/soc/intel/alderlake/fsp_params.c
1 file changed, 4 insertions(+), 2 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Tim Wawrzynczak: Looks good to me, approved

diff --git a/src/soc/intel/alderlake/fsp_params.c b/src/soc/intel/alderlake/fsp_params.c
index ec7bff6..584364b 100644
--- a/src/soc/intel/alderlake/fsp_params.c
+++ b/src/soc/intel/alderlake/fsp_params.c
@@ -3,6 +3,7 @@
 #include <assert.h>
 #include <cbfs.h>
 #include <console/console.h>
+#include <cpu/intel/microcode.h>
 #include <device/device.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
@@ -340,11 +341,12 @@
    size_t microcode_len;

/* Locate microcode and pass to FSP-S for 2nd microcode loading */
-	microcode_file = cbfs_map("cpu_microcode_blob.bin", &microcode_len);
+	microcode_file = intel_microcode_find();
+	microcode_len = get_microcode_size(microcode_file);

if ((microcode_file != NULL) && (microcode_len != 0)) {
    	/* Update CPU Microcode patch base address/size */
-		s_cfg->MicrocodeRegionBase = (uint32_t)microcode_file;
+		s_cfg->MicrocodeRegionBase = (uint32_t)(uintptr_t)microcode_file;
    	s_cfg->MicrocodeRegionSize = (uint32_t)microcode_len;
    }

3 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the submitted one.