Sridhar Siricilla has submitted this change. ( https://review.coreboot.org/c/coreboot/+/71569 )
Change subject: soc/intel/common: Check PRMRR dependent features ......................................................................
soc/intel/common: Check PRMRR dependent features
Add below mentioned functions:
is_sgx_configured_and_supported(): Checks if SGX is configured and supported is_keylocker_configured_and_supported(): Checks if Key Locker is configured and supported check_prm_features_enabled(): Checks if any of the features that need PRM are configured and supported. As of now SGX and Key Locker are the only features that need PRM.
Also, call check_prm_features_enabled() from get_valid_prmrr_size() to make sure PRM dependent features are enabled and configured before returning PRMRR size.
Signed-off-by: Pratikkumar Prajapati pratikkumar.v.prajapati@intel.com Change-Id: I51d3c144c410ce4c736f10e3759c7b7603ec3de9 Reviewed-on: https://review.coreboot.org/c/coreboot/+/71569 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Kapil Porwal kapilporwal@google.com --- M src/soc/intel/common/block/cpu/cpulib.c 1 file changed, 74 insertions(+), 22 deletions(-)
Approvals: build bot (Jenkins): Verified Kapil Porwal: Looks good to me, approved
diff --git a/src/soc/intel/common/block/cpu/cpulib.c b/src/soc/intel/common/block/cpu/cpulib.c index 1f98325..072b2fd 100644 --- a/src/soc/intel/common/block/cpu/cpulib.c +++ b/src/soc/intel/common/block/cpu/cpulib.c @@ -395,12 +395,58 @@ msr_set(MSR_LT_CONTROL, LT_CONTROL_LOCK); }
+bool is_sgx_supported(void) +{ + struct cpuid_result cpuid_regs; + msr_t msr; + + /* EBX[2] is feature capability */ + cpuid_regs = cpuid_ext(CPUID_STRUCT_EXTENDED_FEATURE_FLAGS, 0x0); + msr = rdmsr(MTRR_CAP_MSR); /* Bit 12 is PRMRR enablement */ + return ((cpuid_regs.ebx & SGX_SUPPORTED) && (msr.lo & MTRR_CAP_PRMRR)); +} + +static bool is_sgx_configured_and_supported(void) +{ + return CONFIG(SOC_INTEL_COMMON_BLOCK_SGX_ENABLE) && is_sgx_supported(); +} + +bool is_keylocker_supported(void) +{ + struct cpuid_result cpuid_regs; + msr_t msr; + + /* ECX[23] is feature capability */ + cpuid_regs = cpuid_ext(CPUID_STRUCT_EXTENDED_FEATURE_FLAGS, 0x0); + msr = rdmsr(MTRR_CAP_MSR); /* Bit 12 is PRMRR enablement */ + return ((cpuid_regs.ecx & KEYLOCKER_SUPPORTED) && (msr.lo & MTRR_CAP_PRMRR)); +} + +static bool is_keylocker_configured_and_supported(void) +{ + return CONFIG(INTEL_KEYLOCKER) && is_keylocker_supported(); +} + +static bool check_prm_features_enabled(void) +{ + /* + * Key Locker and SGX are the features that need PRM. + * If either of them are enabled return true, otherwise false + * */ + return is_sgx_configured_and_supported() || + is_keylocker_configured_and_supported(); +} + int get_valid_prmrr_size(void) { msr_t msr; int i; int valid_size;
+ /* If none of the features that need PRM are enabled then return 0 */ + if (!check_prm_features_enabled()) + return 0; + if (!CONFIG(SOC_INTEL_COMMON_BLOCK_SGX_ENABLE)) return 0;
@@ -523,25 +569,3 @@ { return cpu_get_max_turbo_ratio() * CONFIG_CPU_BCLK_MHZ; } - -bool is_sgx_supported(void) -{ - struct cpuid_result cpuid_regs; - msr_t msr; - - /* EBX[2] is feature capability */ - cpuid_regs = cpuid_ext(CPUID_STRUCT_EXTENDED_FEATURE_FLAGS, 0x0); - msr = rdmsr(MTRR_CAP_MSR); /* Bit 12 is PRMRR enablement */ - return ((cpuid_regs.ebx & SGX_SUPPORTED) && (msr.lo & MTRR_CAP_PRMRR)); -} - -bool is_keylocker_supported(void) -{ - struct cpuid_result cpuid_regs; - msr_t msr; - - /* ECX[23] is feature capability */ - cpuid_regs = cpuid_ext(CPUID_STRUCT_EXTENDED_FEATURE_FLAGS, 0x0); - msr = rdmsr(MTRR_CAP_MSR); /* Bit 12 is PRMRR enablement */ - return ((cpuid_regs.ecx & KEYLOCKER_SUPPORTED) && (msr.lo & MTRR_CAP_PRMRR)); -}