Attention is currently required from: Jeremy Soller, Tim Wawrzynczak, Angel Pons, Patrick Rudolph. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56256 )
Change subject: src/soc/intel/*: Change legacy_8254_timer to CMOS option ......................................................................
Patch Set 5:
(7 comments)
File src/soc/intel/alderlake/fsp_params.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-123950): https://review.coreboot.org/c/coreboot/+/56256/comment/a14e2e47_fcc109e3 PS5, Line 494: const unsigned int legacy_8254_timer = get_uint_option("legacy_8254_timer", CONFIG(USE_LEGACY_8254_TIMER)); line over 96 characters
File src/soc/intel/cannonlake/fsp_params.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-123950): https://review.coreboot.org/c/coreboot/+/56256/comment/0e2326c1_488e4705 PS5, Line 430: const unsigned int legacy_8254_timer = get_uint_option("legacy_8254_timer", CONFIG(USE_LEGACY_8254_TIMER)); line over 96 characters
File src/soc/intel/elkhartlake/fsp_params.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-123950): https://review.coreboot.org/c/coreboot/+/56256/comment/19fb5ddd_66b92abe PS5, Line 147: const unsigned int legacy_8254_timer = get_uint_option("legacy_8254_timer", CONFIG(USE_LEGACY_8254_TIMER)); line over 96 characters
File src/soc/intel/icelake/fsp_params.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-123950): https://review.coreboot.org/c/coreboot/+/56256/comment/1ba45db6_53beb9f6 PS5, Line 98: const unsigned int legacy_8254_timer = get_uint_option("legacy_8254_timer", CONFIG(USE_LEGACY_8254_TIMER)); line over 96 characters
File src/soc/intel/jasperlake/fsp_params.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-123950): https://review.coreboot.org/c/coreboot/+/56256/comment/6f9d744f_0c45928e PS5, Line 90: const unsigned int legacy_8254_timer = get_uint_option("legacy_8254_timer", CONFIG(USE_LEGACY_8254_TIMER)); line over 96 characters
File src/soc/intel/skylake/chip.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-123950): https://review.coreboot.org/c/coreboot/+/56256/comment/d2c53af7_af87ba55 PS5, Line 346: const unsigned int legacy_8254_timer = get_uint_option("legacy_8254_timer", CONFIG(USE_LEGACY_8254_TIMER)); line over 96 characters
File src/soc/intel/tigerlake/fsp_params.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-123950): https://review.coreboot.org/c/coreboot/+/56256/comment/e8dff2bf_1c178c57 PS5, Line 552: const unsigned int legacy_8254_timer = get_uint_option("legacy_8254_timer", CONFIG(USE_LEGACY_8254_TIMER)); line over 96 characters